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DAC38J82EVM: SYSREF not detected in FPGA

Part Number: DAC38J82EVM
Other Parts Discussed in Thread: DAC38J82

38J82: LMFS:8 2 1 2    HD :1

channal A can ouput data but channal C can not ;

why channal C can not out put data;

Please help me solve this problem;

Thank you ! best wishes

  • User,

    This DAC can output 2 paths on any of the four available outputs. Is there a chance you have the part configured for CHB or CHD as the second output? The TI GUI sets the DAC38J82EVM to use CHA and CHB by default. For CHA and CHC operation, make sure the following two addresses are set as follows:

    ADD            Data

    0x22            0x1B27

    0x1A            0x0025

    This sets the output mux to send data to CHA and CHC. This also sleeps CHB and CHD.

    Regards,

    Jim

  • I tried this configuration, but there is still no output.

     Must the FPGA's lane ID match the ID of the DAC38J82?

    I have a new trouble now.

    I configured the DAC  LMFKS 821 20 1   FPGA clock:100M, DAC Output rate 800MSPS

    Channal A default output is 50M,If I want the output of 70, do I need to modify the NCO register?

    How to modify some registers of NCO? Is there an example?

    Thank you !