DAC37J84: Ground separation for DAC37J84

Kiran,

The grounds are all internally connected at the die and the package so there are no separations among different domains. This is to minimize inductance among the rails when operating in the GSPS level.
What you can do on the PCB level is to route the power supply net, decoupling capacitor, and grounding to avoid the digital coupling from the digital domain (i.e. ground bounce) from looping into the analog rails.
In general, the description for each supply basically highlighted whether it is in digital domain, analog domain, and also the sampling clock domain. The sampling clock is important as any noise disturbance to the sampling clock will be a direct 1:1 coupling to the DAC output.
analog core supply used to bias the DAC core:
1. VDDADAC3.3
2. VDDAREF1.8
sampling clock circuitry:
1. VDDAPLL1.8 for the on-chip PLL/VCO
2. VDDCLK0.9 for internal clocking distribution (important sampling clock).
digital supplies:
1. VDDDIG0.9
2. VDDIO18
3.VDDS1.8
4. VQPS18
5. VDDDAC0.9
SERDES (sensitive to coupling and noise for good BER)
1. VDDR18
2. VDDT0.9

The DAC37j84 is a mixed signal device. There are some circuits that are bridging the digital and analog domain so certain circuit power supplies lie in between the two domains. This is the case as the VDDDAC0.9V. There is no hard cut-off to indicate whether one rail is completely analog or another rail is completely digital. They all have to return to the same ground. Therefore, it is important on the PCB level that the decoupling capacitors and ground return to the corresponding ground domain, and each ground domain need to be connected such that the ground loop will not form. If there are any ground loop being formed, the inductance at these GSPS DACs will be significant and introduce performance degradation. You may see on our EVM that we use single ground in the layout. We do place our decoupling capacitor orientations carefully such that the ground return (i.e. noise return) of the digital ground does not go back directly to the analog ground (through the analog rail capacitor) and return back to the analog power rails.

-Kang