If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

# AMC1306M25: Peformance Comparison with AMC1303M2520 and AMC1303M2510

Part Number: AMC1306M25
Other Parts Discussed in Thread: AMC1303M2520, , TMS320F28377S

Customer did a performance test with AMC1303M2520/AMC13032510 and AMC1306M25. They found the AMC1306 coming with noise problem on sampling wavefrom. We would like to know what happened is? and is there any suggestion on surrounding circuit to improve it? We'd prefer to use AMC1306

Application: PDU

DSP: TMS320F28377S

Customer: TW

Code Setting in the C2000

Sinc filter type = sinc3
Modulator data rate = 20 MHz (AMC13032520)
OSR = 256
MODULATOR MODE [MOD] = MODE1(The modulator clock is running with half of the modulator data rate.)
Data rate of Sinc Filter = 20 MHz / 256 / 2 = 39.1 K samples / sec

b)

Sinc filter type = sinc3
Modulator data rate = 10 MHz (AMC13032510)
OSR = 256
MODULATOR MODE [MOD] = MODE1(The modulator clock is running with half of the modulator data rate.)
Data rate of Sinc Filter = 10 MHz / 256 / 2 = 19.5 K samples / sec

Sampling waveform

System:

Circuit:

• Hi Brian,

Just curious at the moment, but what were the DSP settings for the AMC1306?
• pls find here for AMC1306 setting.

AMC1306 setting :
Filter type = sinc3
Modulator data rate = 20 MHz
OSR = 256
MODULATOR MODE [MOD] = MODE1(The modulator clock is running with half of the modulator data rate.)

What's the differnce in between? thanks.
• Hi Brian,

All things being equal on the DSP side of the equation, you would need to consider the clock for the AMC1306 versus AMC1303 and the data hold times for each. The AMC1303 provides the clock and data to the DSP and has valid data hold time of 7ns against the rising clock. This should satisfy the 5ns setup/hold time requirement for the DSP which samples data on the rising clock edge.

The AMC1306 needs a clock sourced to it, so depending on how that is done, you may run into some timing issues. The first thing to note, is that the AMC1306 only has a valid data hold time of 3.5ns against the rising clock edge, which violates the hold time condition in the DSP. Depending on how the clock is sourced back to the SDFM module, you could have further delay issues with the DATA, causing the DSP to 'miss' samples and then providing the noisy output that you see. You could try using the GPIO_INV function on the SD_Cx input to see if that helps clean up the noise.

• Hi Tom,

I tried using the GPIO_INV function on the SD_Cx input. I took the sampling waveform the following:

`Code:`
```#define EPWM_TIMER_TBPRD 65535
void main(void){

#ifdef AMC1306
EALLOW;
OutputXbarRegs.OUTPUT3MUX0TO15CFG.bit.MUX0 = 3; // Select ECAP1.OUT on Mux0
OutputXbarRegs.OUTPUT3MUXENABLE.bit.MUX0 = 1;  // Enable MUX0 for ECAP1.OUT
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 3;    // Select OUTPUTXBAR3 on GPIO5
EDIS;

//-------------------------------------------------
ECap1Regs.ECCTL2.bit.CAP_APWM = 1;      // Enable APWM mode
ECap1Regs.CAP1 = 39;            // Set Period value
ECap1Regs.CAP2 = 19;            // Set Compare value
ECap1Regs.ECCLR.all = 0x0FF;            // Clear pending __interrupts
ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1;    // enable Compare Equal Int

ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1;
//------------------------------------------------

sdfm_setup();

#endif

// Enable Global __interrupt INTM
EINT;
// Enable Global realtime __interrupt DBGM
ERTM;

for(;;);
}
void InitEPwm(Uint32 gPWM_number){
uint16_t CMPC,CMPD;

CMPC = 200;
CMPD = 200;

GPIO_SetupPinOptions(4, GPIO_OUTPUT, GPIO_ASYNC);
GPIO_SetupPinMux(4,GPIO_MUX_CPU1,1);

EALLOW;

//
// Allows all users to globally synchronize all enabled ePWM modules to
// the time-base clock (TBCLK)
//
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;

//
// Setup TBCLK
//
(*EPWM[gPWM_number]).TBPHS.bit.TBPHS = 0x0000;    // Phase is 0
(*EPWM[gPWM_number]).TBCTR = 0x0000;              // Clear counter
(*EPWM[gPWM_number]).TBPRD = EPWM_TIMER_TBPRD;    // Set timer period
// 801 TBCLKs.

(*EPWM[gPWM_number]).CMPC = CMPC;                 // Set Compare C value
(*EPWM[gPWM_number]).CMPD = CMPD;                 // Set Compare D value

(*EPWM[gPWM_number]).CMPA.bit.CMPA = CMPC;        // Set Compare C value
(*EPWM[gPWM_number]).CMPB.bit.CMPB = CMPD;        // Set Compare D value

//
// Setup counter mode
//
(*EPWM[gPWM_number]).TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
(*EPWM[gPWM_number]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
(*EPWM[gPWM_number]).TBCTL.bit.CLKDIV = TB_DIV1;

//
// Set actions
//
(*EPWM[gPWM_number]).AQCTLA.bit.CAU = 3;      // Set PWM1A on event A, up
// count

//
// Set actions
//
(*EPWM[gPWM_number]).AQCTLB.bit.CBU = 3;      // Set PWM1A on event A, up
// count

EDIS;
}
__interrupt void Sdfm1_isr(void){

static Uint32 cnt = 0;
static Uint32 cnt1 = 0, cnt2 = 0, cnt3 = 0;

#ifdef AMC1306
if(cnt1 < MAX_SAMPLES)
else
cnt1 = 0;
}
if(cnt2 < MAX_SAMPLES)
else
cnt2 = 0;
}
if(cnt3 < MAX_SAMPLES)
else
cnt3 = 0;
}
if(cnt < MAX_SAMPLES)
else
cnt = 0;
}
#endif

Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP5);
}

void sdfm_setup(void){

Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP5);
Interrupt_register(INT_SD1, Sdfm1_isr);
Interrupt_enable(INT_SD1);
Interrupt_register(INT_SD2, Sdfm2_isr);
Interrupt_enable(INT_SD2);

for(uint16_t pin=16; pin<=31; pin++){
GPIO_SetupPinOptions(pin, GPIO_INPUT, GPIO_ASYNC);
GPIO_SetupPinMux(pin, GPIO_MUX_CPU1, 7);
}
GPIO_SetupPinOptions(17, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(19, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(21, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(23, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(25, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(27, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(29, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(31, GPIO_INPUT, GPIO_INVERT);

Sdfm_configureInputCtrl(SDFM1, FILTER1, MODE_0);
Sdfm_configureInputCtrl(SDFM1, FILTER2, MODE_0);
Sdfm_configureInputCtrl(SDFM1, FILTER3, MODE_0);
Sdfm_configureInputCtrl(SDFM1, FILTER4, MODE_0);
//      Sdfm_configureInputCtrl(SDFM2, FILTER1, MODE_0);
//	Sdfm_configureInputCtrl(SDFM2, FILTER2, MODE_0);
//	Sdfm_configureInputCtrl(SDFM2, FILTER3, MODE_0);
//	Sdfm_configureInputCtrl(SDFM2, FILTER4, MODE_0);

Sdfm_configureData_filter(SDFM1, FILTER1, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM1, FILTER2, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM1, FILTER3, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM1, FILTER4, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
//    Sdfm_configureData_filter(SDFM2, FILTER1, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
//    Sdfm_configureData_filter(SDFM2, FILTER2, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
//    Sdfm_configureData_filter(SDFM2, FILTER3, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
//    Sdfm_configureData_filter(SDFM2, FILTER4, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);

Sdfm_enableMFE(SDFM1);
//    Sdfm_enableMFE(SDFM2);

Sdfm_configureExternalreset(SDFM1,FILTER_1_EXT_RESET_ENABLE,
FILTER_2_EXT_RESET_ENABLE,
FILTER_3_EXT_RESET_ENABLE,
FILTER_4_EXT_RESET_ENABLE);

//    Sdfm_configureExternalreset(SDFM2,FILTER_1_EXT_RESET_ENABLE,
//    		                        FILTER_2_EXT_RESET_ENABLE,
//				        FILTER_3_EXT_RESET_ENABLE,
//				        FILTER_4_EXT_RESET_ENABLE);

InitEPwm(11);
//    InitEPwm(12);

DELAY_US(1000);
Sdfm_configureInterrupt(SDFM1, FILTER1, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM1, FILTER2, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM1, FILTER3, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM1, FILTER4, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
//    Sdfm_configureInterrupt(SDFM2, FILTER1, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
//    Sdfm_configureInterrupt(SDFM2, FILTER2, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
//    Sdfm_configureInterrupt(SDFM2, FILTER3, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
//    Sdfm_configureInterrupt(SDFM2, FILTER4, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);

while((*EPWM[11]).TBCTR < 550);
//    while((*EPWM[12]).TBCTR < 550);

DELAY_US(1000);
Sdfm_enableMIE(SDFM1);
//    Sdfm_enableMIE(SDFM2);

}```

` `
• Hi yousi,

Welcome to our e2e forum!  I am sorry to see that the INV function did not work out for you.  Do you have screen captures to share of the CLK and DAT inputs to the SDFM?

• Hi Tom,

Here is the waveform of CLK & DAT.

• Hi yousi,

It looks like you have quite a bit of ringing on the data lines, you can try adding a small series resistor (~30-100 ohms) to see if that helps, a small parallel cap may help as well. Also, I see eight entries in your DSP code for the GPIO INVT function, are you inverting clock AND data or just clock?
• Hi Tom,

I tried adding a small series resistor on the data lines, but the issue wasn't be resolved. Figure 1. shows the  waveform of the CLK and DATA line for AMC1303M25. It had quite a bit of ringing on the clk data lines, too.

Figure1. CLK & DATA line waveforms of the AMC1303

So I didn't tried to find issue about hardware. Then I found the period of sampling waveform trap.

It seems that the EPwm11 and EPwm12 signals.

Figure 2. the sampling waveform of the AMC1306

And I disable the PWM module to synchronize filters. The issue seems like to be resolved. Figure 3. shows the sampling waveform of the AMC1306 when disable the EPWM module.

• This is my setup SDFM code.

```#include "appInclude.h"

void sdfm_setup_2(void);
void main(void){

Board_init();
#ifdef AMC1306
EALLOW;
OutputXbarRegs.OUTPUT3MUX0TO15CFG.bit.MUX0 = 3; // Select ECAP1.OUT on Mux0
OutputXbarRegs.OUTPUT3MUXENABLE.bit.MUX0 = 1;  // Enable MUX0 for ECAP1.OUT
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 3;    // Select OUTPUTXBAR3 on GPIO5
EDIS;

//-------------------------------------------------
ECap1Regs.ECCTL2.bit.CAP_APWM = 1;      // Enable APWM mode
//	ECap1Regs.CAP1 = 9;            // Set Period value(20MHz)
//	ECap1Regs.CAP2 = 4;            // Set Compare value(20MHz)
//	ECap1Regs.CAP1 = 19;           // Set Period value(10MHz)
//	ECap1Regs.CAP2 = 9;            // Set Compare value(10MHz)
ECap1Regs.CAP1 = 39;           // Set Period value(5MHz)
ECap1Regs.CAP2 = 19;           // Set Compare value(5MHz)
ECap1Regs.ECCLR.all = 0x0FF;            // Clear pending __interrupts
ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1;    // enable Compare Equal Int

ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1;
//------------------------------------------------

sdfm_setup_2();

// Enable Global __interrupt INTM
EINT;
// Enable Global realtime __interrupt DBGM
ERTM;

for(;;);
}
void sdfm_setup_2(void){

Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP5);
Interrupt_register(INT_SD1, Sdfm1_isr);
Interrupt_enable(INT_SD1);
Interrupt_register(INT_SD2, Sdfm2_isr);
Interrupt_enable(INT_SD2);

for(uint16_t pin=16; pin<=31; pin++){
GPIO_SetupPinOptions(pin, GPIO_INPUT, GPIO_ASYNC);
GPIO_SetupPinMux(pin, GPIO_MUX_CPU1, 7);
}
GPIO_SetupPinOptions(17, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(19, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(21, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(23, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(25, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(27, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(29, GPIO_INPUT, GPIO_INVERT);
GPIO_SetupPinOptions(31, GPIO_INPUT, GPIO_INVERT);

Sdfm_configureInputCtrl(SDFM1, FILTER1, MODE_0);
Sdfm_configureInputCtrl(SDFM1, FILTER2, MODE_0);
Sdfm_configureInputCtrl(SDFM1, FILTER3, MODE_0);
Sdfm_configureInputCtrl(SDFM1, FILTER4, MODE_0);
Sdfm_configureInputCtrl(SDFM2, FILTER1, MODE_0);
Sdfm_configureInputCtrl(SDFM2, FILTER2, MODE_0);
Sdfm_configureInputCtrl(SDFM2, FILTER3, MODE_0);
Sdfm_configureInputCtrl(SDFM2, FILTER4, MODE_0);

Sdfm_configureData_filter(SDFM1, FILTER1, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM1, FILTER2, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM1, FILTER3, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM1, FILTER4, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM2, FILTER1, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM2, FILTER2, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM2, FILTER3, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);
Sdfm_configureData_filter(SDFM2, FILTER4, FILTER_ENABLE, SINC3, OSR_256, DATA_16_BIT, SHIFT_9_BITS);

Sdfm_enableMFE(SDFM1);
Sdfm_enableMFE(SDFM2);

Sdfm_configureExternalreset(SDFM1,FILTER_1_EXT_RESET_DISABLE, FILTER_2_EXT_RESET_DISABLE, FILTER_3_EXT_RESET_DISABLE, FILTER_4_EXT_RESET_DISABLE);
Sdfm_configureExternalreset(SDFM2,FILTER_1_EXT_RESET_DISABLE, FILTER_2_EXT_RESET_DISABLE, FILTER_3_EXT_RESET_DISABLE, FILTER_4_EXT_RESET_DISABLE);

//    InitEPwm(11);
//    InitEPwm(12);

DELAY_US(1000);
Sdfm_configureInterrupt(SDFM1, FILTER1, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM1, FILTER2, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM1, FILTER3, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM1, FILTER4, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM2, FILTER1, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM2, FILTER2, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM2, FILTER3, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);
Sdfm_configureInterrupt(SDFM2, FILTER4, IEH_DISABLE, IEL_DISABLE, MFIE_ENABLE, AE_ENABLE);

//    while((*EPWM[11]).TBCTR < 550);
//    while((*EPWM[12]).TBCTR < 550);

DELAY_US(1000);
Sdfm_enableMIE(SDFM1);
Sdfm_enableMIE(SDFM2);

}```

• Hi yousi!

This is really cool!  I'm happy to see that you got it working.