ADS7263: maximum clock frequency

Richard Kelly17

Part Number: ADS7263

Hi,

We are developing an application with two off ADS7263 running them in half-clock mode at 20MHz. The tolerance on the clock source is 1%, so some ADCs could see a clock frequency of 20.2MHz. Clearly this exceeds the maximum in the data sheet. Can you say whether this presents a real problem? If so then how would the performance of the ADC be affected? (Any design change to reduce the clock frequency would be problematic for the stage of development of the application.)

Best Regards

Richard

over 7 years ago

0 Luis Chioye over 7 years ago

TI__Guru 55466 points

HI Richard,

The device is characterized over temperature range (-40C to 125C), device variation and voltage supply variation using a nominal 20MHz CLOCK on Half-clock mode. The ADC conversion time is controlled by CLK, as well as the serial interface communication. A relative small deviation/tolerance of 1% on CLOCK will not create a problem since the device is specified conservatively allowing for small deviations.

Best Regards,

Luis

0 Richard Kelly17 over 7 years ago in reply to Luis Chioye

Prodigy 20 points

Thanks, that answered my question

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ADS7263: maximum clock frequency