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ADC3441: Digital Inputs support 1.8V and 3.3V logic levels but but why not 2.5V?

Part Number: ADC3441

Hello, 

In Digital specifications of ADC3341, it is written that digital inputs of ADC3441 (RESET, SCLK, SDATA, SEN, PDN) support 1.8V and 3.3V logic levels, but why not 2.5V?

My question is I have an FPGA with 2.5V logic levels, could I connect FPGA IO to ADC directly IO without level shifter?

  • Hi Yves,

    Yes, you can use 2.5V for the SPI pins. Please keep in mind that DVDD is 1.8V, so when the ADC3441 is talking back on the SPI bus, the output will be 1.8V translated. I would make sure that the VOH/VOL of the ADC3441 are compatible with the VIH/VIL of the other devices connected to the SPI bus. To mitigate potential issues here, I would suggest the use of a level translator.

    Best Regards,

    Dan