Other Parts Discussed in Thread: ADS1292
Dear TI Experts,
My customer is evaluating ADS1292R in a new project, they can hardly detect lead-off, could you kindly help to review below HW and SW and give some advice for this case? Thanks a lot.
FW initiation configuration:
ADS1292_SendCommand(ADS1292_CMD_SDATAC);
ADS1292_WriteRegister(ADS1292_REG_CONFIG1, 0x01); // continuous conversion mode,sample rate to 250sps
ADS1292_WriteRegister(ADS1292_REG_CONFIG2, 0xe0);//Lead-off comparators enabled
ADS1292_WriteRegister(ADS1292_REG_LOFF, 0xd0);//75% - 25%
ADS1292_WriteRegister(ADS1292_REG_CH1SET, 0x60);//pga = 12
ADS1292_WriteRegister(ADS1292_REG_CH2SET, 0x60);//pga = 12
ADS1292_WriteRegister(ADS1292_REG_RLD_SENS, 0x2f);
ADS1292_WriteRegister(ADS1292_REG_LOFF_SENS, 0x0F); // Turn on both P- and N-side of all channels for lead-off sensing
ADS1292_WriteRegister(ADS1292_REG_LOFF_STAT, 0x00);
ADS1292_WriteRegister(ADS1292_REG_RESP1, 0x02);
ADS1292_WriteRegister(ADS1292_REG_RESP2, 0x83);
ADS1292_WriteRegister(ADS1292_REG_GPIO, 0x00);
ADS1292_SendCommand(ADS1292_CMD_OFFSETCAL);
nrf_delay_ms(200);
Key Register configuration
|
Reg |
value |
|
01 |
0x01 |
|
02 |
0xe0 |
|
03 |
0xd0 |
|
04 |
0x60 |
|
05 |
0x60 |
|
06 |
0x2f |
|
07 |
0x0f |
|
08 |
0x00 |
|
09 |
0x02 |
|
0a |
0x83 |
When INT comes, can hardly detect lead-off from the ADC data
Channel data(24 status bits + 24 bits × 2 channels) = 72 bits
read 3 byte status register (1100 + LOFF_STAT[4:0] + GPIO[1:0] + 13 '0's)
LOFF_STAT[4:0] is RLD_STAT,IN2N_OFF,IN2P_OFF,IN1N_OFF,IN1P_OFF



