Hello,I have some questions about configurations and line rate. I use DAC38J82 and output rate is 1GSPS per converter(DACA and DACB). In this way, LMF is 821,S is 2,HD is 1,interpolation is 1,the serdes line rate
is 5Gbps,DACCLK from internal PLL is 1GHz.
For line rate, I want to know if Jsed204 in FPGA and DAC's reference clock must be from the same clock source?IF Jsed204's reference clock in FPGA is from Onboard crystal oscillator ,which is about 125MHz,while
DAC's DACCLK_P and DACCLK_N is from AD9516 ,which is about 452MHz.In this way, the rate in FPGA actually does not match the rate in DAC.In DAC38J82's technical document,I don't find the signals which can
control the input and output rate like FIFO,or output clock which I can use in FPGA to control the rate.So, could you give me some ideas?
For configurations , I have confusion in config34 .What does datapath and sample 0-3 mean?I want to use converters DACA and DACB,and I have slept DACC and DACD in another config.I want to transmit the data
in line 0-3 to DACA and the data in line 4-7 to DACB,so how should I change the default value of config34.
I would appreciate it if you can solve my problems as soon as possible.
