Other Parts Discussed in Thread: AMC1210,
I am using the VHDL code provided in the SBAA094 note. The output of the VHDL module is 25 bits (0-24).
If I intend on using a clock frequency of 10MHz, and a decimation factor of 128, which of the 25 output bits do I want? That is, which bits are most significant, and what do I do with the rest?