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DAC084S085: Supply power at /SYNC and DIN pins are high

S.Satoshi
Guru 21675 points
Part Number: DAC084S085

Hi,

I found following explanation that SYNC and DIN buffers draw more current when they are high. Then the customer would like to know the estimated supply current or supply power at both SYNC and DIN are high. Can I refer the normal supply power, PN at such situation?

  • Because the SYNC and DIN buffers draw more current when they are high, they must be idled low between write sequences to minimize power consumption.

 

Best Regards,

Satoshi

  • 0
    TI__Mastermind 46290 points
    Satoshi-san,

    I believe this is the purpose of the "Input Current" specification in the "Logic Input Characteristics" section of the datasheet, which is specified as 1uA. Unfortunately the datasheet is not clear concerning whether this is at input logic 3V or 5V, as the rest of the document does separate those two conditions. In any case even if we assume it was at 3V it would suggest ~1.6uA for the 5V situation since this should behave linearly.

    When the signals are switching, they will consume more current than when at steady state. This is where the other specification "Normal Supply Power" @ 30MHz SCLK comes into play, versus the condition with SCLK 0MHz.

    So while the comment in the datasheet does remain true, I'm not really sure how practically valuable that insight really is.