Other Parts Discussed in Thread: ADS4129
Both ADS61B29 and ADS4129 datasheets specify a MIN sine wave amplitude for clock input of 0.3v and 0.2v, respectively. However for a LVDS clock input only a TYP amplitude of 0.7v is specified. Given that many LVDS sources have output amplitudes well below 0.7v p-p, we would like to understand what the actual minimum LVDS amplitude requirement is so we know how much margin we will have with various LVDS clock drivers.
Please answer for both ADS61B29 and ADS4129.