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TLA2021: Does floating of SCL and SDA pins at powering up cause malfunctions of this IC?

Part Number: TLA2021

Dear Sirs or Madams,

SCL pin and SDA pins need external pullup resistors.

Is it acceptable that the pullup on SCL/SDA pins are activated after this IC has been powered on?

Please let me show an example below;

   There are two power signals, VDD_1 and VDD_2, and VDD_1 is activated earlier than VDD_2.

   On this condition, can we connect VDD_1 signal to this IC's VDD pin and pull up SCL/SDA pins by VDD_2 signal?

    If we connect signals as mentioned above, SCL/SDA pins will be left floating

    from the moment when VDD_1 is activated, which means this IC is powered-on,

    to the moment when VDD_2 is activated.

    Does this floating on SCL/SDA pins at powering up cause any problems on this IC?

Best regards,

Shinsuke Tanaka

  • Shinsuke-san,


    I am not aware of any problems with momentarily floating the SDA/SCL lines for the TLA2021 at start up. However, there are two reasons that I think that this should not be a problem for the device.

    First, floating the SCL and SDA lines should not be decoded as an attempted communication to the device, unless the SCL and SDA float to voltages to decode the address of the device. This is extremely unlikely to happen.

    Second, this device has a built in communication timeout. This is technically outside the I2C specification, but if the device goes for longer than 28ms without finishing a communication, TLA2021 will end the I2C transaction. If there is some momentary hanging of the bus from the device, it would automatically timeout if there is no completed communication.


    Joseph Wu