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DAC38J84: 4 independent outputs

Part Number: DAC38J84
Other Parts Discussed in Thread: TIDA-00996,

Dear all,

is there anyway to generate 4 independent outputs from the DAC38J84 ?

For instance, what about bypassing the NCO ?

regards,

Domenico

  • Hi Domenico

    The DAC38j84 can be used as 4 independent (real) output as long as:

    1. NCO is not used, or used in Fs/2 mixing only

    2. QMC gain is used, but not QMC phase

    Other than these two limitations, I do not see other concerns.

  • Hi Kang,

    thanks for the hint. I completely missed the coarse mixer.

    regards,

    Domenico

  • Hi Kang,

    my AA is considering the following JESD MODE: L=8, M=4, F=1, S=1, HD=1 without interpolation (since NCO =0).
    The TSW14J56 will be used as a waveform generator. The requirement is generating signals using a sample rate of 960MHz.

    Is the TSW14J56 able to support that rate in those conditions ? Which are the limit of the DDR and data rate of the TSW14J56 ?
    The system consists of 2x DAC38J84EVM which will be synchronized as per TIDA-00996.

    regards,
    Domenico
  • Yes it does. The SERDES rate is 9600Mbps, which is supported by TSW14J56. The DDR of the J56 is 2G-samples, and it should be plenty to support all four channels.

    -kang
  • Hi Kang,

    thanks, but the  concerns is more related to the capability of the memory to send data.

    In the feature of the TSW14J56EVM I can read "Quarter rate DDR3 controllers supporting up to 800MHz DDR3 operation".

    Since I'm not familiar with the terms "Quarter rate", can the memory tranfer the data to the DAC in order to have a fs=960MHz  for each channel ?

    If it is not possible, can the TSW14J57 do the job with DAC38j84EVM ?

    regards,

    Domenico

  • Domenyko,

    The HSDC PRO load the playback pattern into the TSW14J56 memory (or DDR) and the pattern gets played back repeatedly.

    All the clocking and the gear box ratio are handled within the firmware so you do not need to be concerned about the implementation. You can be assured that the pattern inside the DDR gets played back at 960MSPS.

    -Kang

  • Hi Kang,

    thanks for the clarification.

    regards,

    Domenico