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ADS1224: IBIS Model behavior

Part Number: ADS1224
Other Parts Discussed in Thread: ADS1220, ADS1226

Hi

Our customer simulated the transmission-line model with IBIS model(ads1224.ibis: Ver 3.2). {ADS1224 ~ Line ~ MCU}

However the "drdy_dout_5" does not output.(It means the output voltage is 0V.) 

On the other hand, they switched the model from ADS1224 to ADS1220 on the same transmission-line circuit. It does work. (the pulse signal outputs from drdy_5.)

Is this normal? Or what should we check if we are wrong?

Best Regards,

Koji Hamamoto

  • Hi Hamamoto-san,

    It is difficult to say why one model operates differently than the other. The ADS1224 model is 3.2 and the ADS1220 is 4.0. I do not see significant differences in the models other than the pin names. The names are case sensitive. Can you provide more information as to the IBIS simulation tool being used? Can you provide more information as to the simulation itself and maybe some screen shots of both device responses?

    Thanks,
    Bob B
  • Hi Bob-san,

    Thank you for your reply.

    The detail is included a confidential information for the customer. So, I sent by private message. 

    Could you confirm it?

    Best Regards,

    Koji Hamamoto

  • Hi Hamamoto-san,

    The IBIS models for the ADS1224 was a relatively earlier model in the scope of TI providing ADC IBIS models. It would appear that the large difference between the ADS1224 and the ADS1220 are with respect to the dV/dt_r (rise time) and dV/dt_f (fall time). If you compare the two models you will see that the typical response of the ADS1220 output drives a volt or more in less than a nanosecond whereas the model for the ADS1224 is showing a rate of change of 100mV in a 100 microseconds. This response for the ADS1224 is way off from a realistic value and would not meet the t4 timing specification shown in Figure 25 of the ADS1224 datasheet. I would suspect that if the clocking would change to a much longer period, you would see some change on DOUT/DRDY of the ADS1224 model. So it appears that the ADS1224 model is either incorrect or is using too small of a load (50 Ohm) or possibly both. The ADS1220 uses 500 Ohm. A 50 Ohm load would require a lot of current, so this may be why the rise and fall times seem to be extended.

    A very similar piece of silicon to the ADS1224 is the ADS1226. Even though it uses a different device package, the response of that output cell should be more closely aligned with real value of the ADS1224. The ADS1226 appears to have more realistic rise and fall times in the model.

    Best regards,
    Bob B
  • Hi Bob-san,

    Thank you so much for the information.

    How can we confirm that dV/dt_f and dV/dt_r of IBIS model?
    The dV/dt of ADS1220 is different from ADS1224 although ADS1220 has the timing requirement similar ADS1224.

    And regarding load, we understand that it need large current if the load is small. How much should we set the load when we use ADS1224? (ADS1220 recommend to use 500ohm as you mentioned.)

    Best Regards,
    Koji Hamamoto
  • Hi Hamamoto-san,

    The ADS1224 IBIS model is obviously incorrect and TI will need to make a new model (I'm not sure how long that may take). The ADS1220 device uses a different wafer process and I/O cell as compared to the ADS1224. The model for the ADS1226 may show the correct result as the ADS1226 uses the same wafer process and most likely the same I/O cells as the ADS1224. So the technology is similar between the ADS1224 and the ADS1226, but differs from the ADS1220. Unfortunately I have no way of verifying any of the models at this time as I do not have the simulation integrity tools to run the model. I suggested using the ADS1226 model as it appears to be correct based on rise and fall times and the silicon is very similar to the ADS1224.

    The ADS1220, although it has the lower device number, is actually the newest device in the ADS122x list of devices. The requests for IBIS models for Delta-Sigma ADCs started around the 2010 time frame. As standard practice we now build these models for all new devices, but these earlier devices may not have been verified nor the models for ADC devices fully understood.

    As far as the load, transmission line characteristic impedance is often calculated as 50 Ohm. For these types of devices the CMOS output is relatively low impedance driving a high impedance. It does not terminate to a 50 Ohm termination.

    I understand the desire for simulation and signal integrity checks, but the DRDY/DOUT signal output would be considered low-speed and not high-speed. From an applications perspective, following good layout practices is all you need to do and the IBIS model is not all that important for success. If running the model is important I would recommend to try using the ADS1226 model.

    Best regards,
    Bob B
  • Hi Bob-san,

    I understand. Thank you for your perfect explanation.
    I will suggest ADS1226 IBIS model to the customer.

    Best Regards,
    Koji Hamamoto