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I am trying to use this device on a board with a DAC5672. I am contemplating splitting the ground plane into DRGND and AGND with a star connection by the DAC. If I do this I do not want to inadvertently introduce a ground loop so I am trying to understand what the digital pins are referenced to. If I understand correctly, the output data pins are referenced to DRGND and DRVDD. SEN seems like a digital pin to me but has a pull-up to AVDD.
Does that mean I should drive SEN with a signal referenced between AVDD and AGND or DRVDD and DRGND? And likewise, should I drive OE, CLKP, CLKN, RESET, SCLK, and SDATA the same?
I would recommend you use one GND plane for your board. For the ADC discrete signals, I would suggest to drive the signals with a device that supports either 1.8V or 3.3V CMOS logic levels. Using only one GND plane will be easier to route and will probably give you the best performance. See the attached document for more info regarding this. I also attached the ADS4149EVM schematic as well for reference. On this board, a FTDI device is providing the SPI interface with no problems.
