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AMC1035: Length Matching details for the Data OUT and Clock IN

Part Number: AMC1035
Other Parts Discussed in Thread: ADS7056

Hi,

We are designing board using AMC1035DR. Do you suggest any Length matching for traces of  DATA OUT and CLOCK IN nets. Lets know what is the best delay matching that has to be maintained on board for these 2 nets.

Similarly for ADS7056IRUGR for DATA, CLOCK and CS do you have any Length matching suggestions?

Regards,

Vijetha

  • Hi Vijetha,

    For the AMC1305 itself, there is no specific trace length requirement. Your controller is what you need to worry about - assuming you are using the AMC1035 in the uncoded bitstream mode, you have to provide a clock to both the AMC10355 and your digital filter as well as bring the bitstream into your digital filter. So if you have a very short trace from your clock source to your digital filter (a PWM output and SDFM_CKx input on a C2000 controller for instance), and several inches of trace to the CLKIN of the AMC1035 - you would need to be concerned about the setup and hold time requirements on the data at the input to the filter. If you use the AMC1035 in Manchester encoded mode, there is not as much concern.

    For the ADS7056 (and any typical SPI slave device), the output data is dependent on the clock supplied by the SPI master. Long clock traces that delay data returned from SDO on the ADC to MISO on your controller by half a clock cycle can cause data corruption.