ADS1278EVM-PDK: Mismatch on output of ADS1278EVM between the value captured by ADC Pro and datasheet

user5994553

Part Number: ADS1278EVM-PDK
Other Parts Discussed in Thread: ADS1278

Hello. I have a problem when using ADC Pro and ADS1278EVM to test the performance of ADS1278.

When I short circuit the analog input of channel 5 in high speed mode, the software (ADC Pro) gives me a figure with amplitude around -120dBFS, below is the graph:

However, according to the datasheet of ADS1278, the corresponding graph is look like this, which the value should be around -140dBFS:

When I testing my EVM I was using the default board settings looks like below:

Is something I need to change or my actual testing results are acceptable?

Below is the graph when all channels are open circuit:

over 4 years ago

0 Ryan Andrews over 4 years ago

TI__Guru 57306 points

Hello Yichen,

Welcome to our forum and thank you for your post!

The noise floor appears lower in the datasheet plot because more samples were collected. The noise power is probably the same in both graphs, but the noise "floor" looks higher in the EVM plot because only 8,192 samples were collected. Each time you double the number of samples, I believe the noise floor will reduce by 3 dB (assuming Gaussian or broadband noise).

Try recollecting the data with the EVM using 262,144 points.

Best regards,

0 user5994553 over 4 years ago in reply to Ryan Andrews

Prodigy 40 points

Dear Ryan Andrews,

Hello. Today I tried recolecting data with EVM using 262,144 points, nothing changes. Except channel 5, the value of other signals are around -130dBFS. Is the EVM broken?

Below are the figures of all channels:

0 Ryan Andrews over 4 years ago in reply to user5994553

TI__Guru 57306 points

Hi Yichen,

I think it's still too early to say the EVM is broken. :)

It looks like the noise floor did improve a little bit. Increasing the number of points from 8,192 to 262,144 should theoretically reduce the noise floor by 15 dB = log2(262,144 / 8,192). Understandably, this would still be higher than the data plot in Figure 3.

There are a couple other possible reasons for the additional noise:

The data plotted in Figure 3 was collected with a 27-MHz master clock input, resulting in a data rate of 105,469 SPS in High-Speed Mode. Increasing the data rate to 128,000 SPS will capture more noise.
Our devices are characterized by shorting the channel inputs and biasing them to mid-supply as close to the device pins as possible. The further away you make the connection between AINP and AINN, the more noise you allow to couple into the signal path. Shorting the inputs without biasing them properly can also allow noise to couple. Are the inputs shorted together in your test setup?

Best regards,

0 user5994553 over 4 years ago in reply to Ryan Andrews

Prodigy 40 points

Dear Ryan Andrews,

Now the situation is going worse :(. After I shorted all channels input and decrease the data rate to 105KSPS, the values of all channels (including channel 5) is around -130dBFS. Below are the figures:

Also, the figure for all cahnnels is very wired:

Is there anything other settings I need to change?

Best regards,

Yichen Gu

0 Ryan Andrews over 4 years ago in reply to user5994553

TI__Guru 57306 points

Hi Yichen,

I think we might just be confusing ourselves with how the data displayed in the FFT. Can you please load the histogram tool instead of the FFT and look at the peak-to-peak and RMS noise? You can switch analysis tools without collecting new data - the same data is loaded into whichever analysis tool is open. Please compare the noise results from the histogram with the typical specs in the Electrical Characteristics table. Remember to keep the inputs of each channel shorted together and biased to a mid-supply voltage.

Best regards,