• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 46 subscribers
  • Views 702 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS8866: Timing Requirements

Takashi Yamaguchi
Genius 13830 points
Part Number: ADS8866


Hi team,

My customer is considering to use the ADS8866.

Could you help with the questions below?

1. Is the 1/fsample of ADS8866 1000ns(min) or 10000ns(min)?

2. Tconv is specified as 500ns(min) to 8800ns(max). Does it mean that Customer can set the Tconv arbitrary within the range of 500ns to 8800ns?

3. What happens if Tconve exceeds 8800ns(max)?

4. When the Tsclk is 15ns(min), sclk * 16 = 240ns.  Since the min of Tacq is 1200 ns, does the CONVST need to be held low for 1200ns even after finishing sclk output?

Regards,

Yamaguchi

  • 0
    TI__Mastermind 26058 points

    Yamaguchi,

    1. The conversion process for a SAR ADC consists of two distinct phases. The conversion phase and the acquisition phase. An introduction to front end component selection intro video series gives an overview on this subject and covers how to select the external amplifier and RC circuit required to drive the SAR ADC.
    2. The throughput time is the total time to complete both the conversion and acquisition phase (tthroughput = tconv + tack). The sampling rate is (fsamp = 1/ tthroughput).
    3. The conversion time (tconv) is the time for the internal ADC conversion to complete. This is dependent on an internal oscillator. Although the data sheet gives a range for this value, the maximum is the only value that really matters. Maximum is used because you have to assume the worst case (longest) conversion time when setting up the sampling rate.
    4. The acquisition time (tacq) is the amount of time that the external signal is connected to the internal sample and hold capacitor. The minimum acquisition time is the minimum amount of time required for settling. The minimum value for tacq is used when setting up the maximum sampling rate. For lower sample rates tconv will remain constant and tacq will grow longer.
    5. For this device maximum sampling is: tthroughput = tconv + tack = 8800ns + 1200ns = 10µs. The sampling rate is 1/ tthroughput = 1/10µs = 100ksps.
    6. To directly answer your questions
      1. The customer cannot set tconv. This is internally set and ranges from tconv(min) to tconv(max), but you need to assume worst case tconv(max).
      2. The conversion time will never exceed tconv(max) = 8800ns. This is verified in final test.
      3. Yes. The CONVST pin needs to be held low during acquisition even after finishing sclk output. See graph below.

    I hope that helped.

    Best regards,

    Art Kay

  • 0 in reply to Art Kay
    TI__Genius 13830 points
    Hi Art-san,

    Thank you very much for the answer!!

    Regards,
    Yamaguchi