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DAC37J84EVM: DAC3XJ8X GUI v.1.2 Link Configuration Issue

Part Number: DAC37J84EVM
Other Parts Discussed in Thread: DAC37J84, , DAC38J84, LMK04828

Hello,

I am using the TSW14J56EVM and DAC37J84EVM. I have custom HDL code on the Arria V GZ FPGA on the TSW14J56EVM set for link configuration parameters LMFS =4442, K = 10, and N/N' = 16. I am programming the DAC37J84 using the DAC3XJ8X GUI v.1.2.

On the Quick Start tab, I select the appropriate device, on-board clock, 4 lanes, and interpolation of 4 as shown below. My custom HDL code is set to run off the 184.32MHz clock, and everything should be hunky dory for the handshake between the boards.

When I go to the DAC3XJ8X Control tab, and select the JESD Block is where things start to get wonky. I want to modify the link parameters as listed above, with LMFS = 4442, K = 10, and N/N' = 16. The image below is how the setup appears to me before

  • I am not entirely sure why, but half of my question disappeared after I posted it. To continue:

    The image below is how the setup appears to me before I make any changes.

    I select the parameter I want to change, modify the value, and hit enter. Whatever value I just tried to change, for example changing L from 1 to 4, then gets set to a much higher value and always reverts to that high value when trying to change it again. The image below shows the values each parameter takes after I try to change it.

    Am I missing something with the GUI? I have tried uninstalling/reinstalling to no avail.

    Best,

    Samual McCallum

  • Hello,

    I am assuming that you already ran the typical Step 4 of program the LMK + DAC3xJ8x, reset DAC JESD core, and trigger LMK SYSREF. If so, the DAC38j84 should be set up to be programmed already after executing all of these steps. Please go to the low level page and read the 0x127 to see if you can read back the version ID. It should be 0x0009 by default.

    You mentioned that you have the Altera FPGA firmware loaded. Were you loading it with USB blaster? There is a on-board FTDI USB chip that takes the SPI command from the GUI, which then feeds to the on-board CPLD, and then buffers to the DAC38J84 and LMK04828. THe on-board FTDI chip is also the chip being used by the USB blaster to program your FPGA. The USB blaster FTDI chip does not have identification code over USB bus. It is possible that the DAC38J84 recognize the USB blaster as oppose to the DAC EVM. Please try to unplug the USB blaster first, plug in the DAC38J84 EVM to the USB port, and then press "reconnect USB" button on the GUI to properly link up the GUI with the DAC EVM.

    you may then plug in the USB blaster afterwards since the link between the GUI and DAC EVM has been established. 

     If the CPLD is not programmed properly before EVM shipment, it could also cause such problem. If trying all of the steps above the setup still does not work, we can send the CPLD firmware for you to load. I am assuming you have a USB blaster to program the CPLD and FPGA.

    SInce you already have the TSW14J56, please also try to run the EVM with the default HSDC PRO software with the DAC38J84 EVM per the EVM user's guide.

    Please update us when you can. thanks.

    -Kang

  • Kang,

    Thanks for the response. Just a quick clarification, I am using the DAC37J84EVM, not the DAC38J84. Would that change the config127 register at all?

    And yes, I am using an Altera USB-Blaster to program the TSW14J56 Arria V GZ FPGA, but not using it for anything on the DAC37J84EVM. My understanding is that the DAC GUI programs everything needed for the JESD204B connection on the DAC's end. I have the TSW14J56 Arria V GZ FPGA setup for a JESD204B connection with link parameters LMFS =4442, K = 10, and N/N' = 16, a clock speed of 184.32MHz, and data output rate of 368.64Msps, and a SerDes linerate of 7372.8 Mbps. To the best of my knowledge, the DAC GUI should support these link parameters as well.

    I have done what you suggested, and removed the USB-Blaster from the USB port on my computer, then reconnected the DAC board in the GUI. I still ran into the same issues I mentioned above when trying to program the DAC. Here are the following steps I took:

    1) Remove USB-Blaster from USB port on my computer.

    2) Click the "Reconnect USB" button in the GUI

    3) Plug the USB-Blaster back into my USB port

    4) Program the TSW14J56 FPGA from Quartus via the USB_Blaster

    5) Try to change the GUI link parameters, run into the issue that they automatically change to unwanted values

    I have tried running the GUI in simulation mode. In simulation mode, I am able to change the link parameters to my desired values without them automatically changing. I then reconnect the USB, and try to program the DAC board. For some reason going about it this way, the link parameters get reset to default values (LMFS = 4421, K = 10, N/N' = 16).

    I have been able to successfully run a single-tone example with the default HSDC PRO software, following the DAC3XJ8X Quick-Start Procedure on Pgs. 9-10 of the DAC3XJ8XEVM User Guide, and the WCDMA example listed in the Quick-Start Procedure.

    My main issue is still the the DAC3XJ8X GUI is not letting me input my desired link parameters.

    Thanks,

    Samual McCallum

  • Hello Samual,

    Some quick responses:

    1. the config127 read back is the DIE ID of the chip. Using the EVM to read it back will not change the default value.

    2. To be absolutely sure that the USB blaster is not causing any problem, could you disconnect it from the PC and then connect *ONLY* the DAC37j84 EVM? (If your setup can just have the USB mouse, keyboard, and the DAC37j84EVM, it will be very helpful!) Try to reprogram the DAC37J84 EVM to see if you can get proper read back. Sorry, I just want to be absolutely sure that it is the DAC EVM itself having such issue. We have such problems whenever we try to use USB blaster with the DAC37J84EVM

    3. Could you please take a snap shot of the GUI where you are trying to reprogram so I can try to duplicate it in the lab? Thank you for your help on this.

    -Kang

  • Kang,

    I have disconnected all USB ports besides the DAC USB. (I have a Bluetooth mouse/keyboard so no overlap there).

    A few things I have noticed:

    1) When I first look at the config127 address, it has a value of x0000. After I select the register and hit Read Register, it changes to xFFFF. When I hit the Read All button, every register value, from the LMK04828 to the DAC, changes to xFF or xFFFF. I also noticed the SUBCLASS V drop-down changed to <7> after I pressed Read All. I have attached the images at the bottom labeled accordingly.

    The above happens before I hit program, without changing anything but the device and the clocking to onboard on the quick start page. Once I hit program, and the default LMFS 4421 settings are programmed. The JESD Block values reflect this.

    2) Same issue as in the original question, with the relevant images already up above.

    3) I attached pictures of before programming  for the Quick Start tab (with only the device and EVM Clocking Mode changed to reflect the DAC37J84EVM and on-board clocking) (Fig. 1), the JESD Block (Fig. 2), and the Low Level View . The Low Level View has a picture before I hit Read All (Fig. 3), and after (Fig. 4), showing config107-config127.

    I also included pictures after programming using default values of the Quick Start tab (Fig. 5), and JESD Block tab (Fig. 6), and Low Level View showing config107-config127 (Fig. 7). I did not hit Read All after programming for Fig. 7. I received the same result, however, once I hit Read All with getting all xFF or xFFFF as seen in Fig. 4.

    The pictures are all labeled with a Figure # and brief description.

    Thanks,

    Samual McCallum

    Quick Start Tab before Programming, Clocking Mode and Device modified

    Figure 1

    JESD Block before Programming, no modifications

    Figure 2

    Low Level View before Programming, before Read All

    Figure 3

    Low Level View before Programming, after hitting Read All

    Figure 4

    Quick Start Tab after Programming

    Figure 5

    JESD Block after Programming with default values

    Figure 6

    Low Level View after Programming with default values

    Figure 7

  • Hello Samual,

    I suspect the SPI readback is not proper in your EVM. I will go ahead and order a DAC37J84 EVM myself and test it again to see if I get the same result (we don't see such effect here in the lab). If it is tested good I can send you a replacement. I will contact you offline for your shipping address.

    I suspect the board shop may not program the CPLD properly (which does translation from the USB chip to the DAC37J84). I have attached the CPLD code. If you can power up the board and use USB blaster to program the CPLD via J15. You can give it a try. If you find it risky and may jeopardize your project, I understand and will send you a replacement.

    2248.DAC38J84EVM_CPLD_Rev_C.pof

  • Kang,

    Thank you very much for your efforts, know that they are very much appreciated. I will take a look at using the CPLD code you provided.

    I am interested in getting a replacement ASAP, contact me either through this site or my email at smccallum@agilerfsystems.com, whichever you prefer.

    Thanks again,

    Samual McCallum

  • Hello Kang,

    I have got a DAC37J84EVM board a few days ago.

    I can't connect the DAC37J84EVM to my zync706 evm board yet.

    I want to debug this problem. but i can't read back register using DAC3XJ8X GUI v1.2.

    If I click Read Register in Low Level View Tap, All Register's Read Data is 0xFF.