ADS1018-Q1: ADS1018-Q1

Avanti,


There are a couple of things that could be happening, but I would start by plotting the SPI communication with an oscilloscope or logic analyzer. It is important to see how the device is responding to the /CS line.

The default setting of the device when power is applied to VDD, is to be in power-down/single-shot conversion mode. After this you will need to either set the device to continuous conversion mode to start the ADC or start a conversion by writing a 1 into bit 15 of the Config Register. After that, you should be able to read from the device after the ADC completes it's first conversion.

Are you able to read the conversion register using the 32-bit data transmission cycle? What is your input voltage and what data do you get out? I would note that 255 is FF, and this device is a 12-bit device. It outputs 12 bits right justified, with LSBs zero padded.

In your next post, outline the commands that you're sending to the ADC, and then show the plots of the communication.


Joseph Wu

Hi joseph,

firstly thanks for your reply.

i have initiated SPI Communication, check all the signals on oscilloscopes, 

my configuration is like this

1. initialization of SPI

2.sending data to ADS, Means setting config register, sending 58EB like 

write(0x58EB) IN WHILE LOOP. 

SS=0

MUX=100

PGA  001 MEANS UTP 4 V

MODE= CONTINUOUS

data rate -3330sps

TS= adc mode

pull up enable =1

nop 01

0

sending this data in while 1

after minor delay ..reading data of spi then getting 255

if data ready==0

then read data fuction , as mentioned in data sheet if data ready pin is low then our data is ready,.

please tell me what changes i need to do here. and i am usinh 1 mhz spi clock frequency.

thanks in advance.

Avanti,



As I mentioned previously, I'd like to see the scope shots of the SPI communication. You will want to look at the plots for /CS, DIN, DOUT, and SCLK to make sure that the device is communicating properly. Once you get the scope shots post them back here.

Also, I would recommend using the 32-bit data transmission cycle as shown in Figure 13 of the datasheet. Using this communication, you will be able to see both the output data and the configuration register. Your plot should look like the figure.

Just to check, if you are in continuous conversion mode, even if you are not reading the device back, you should be able to see a periodic pulse on the DOUT/DRDY line at the data rate. You would need to keep /CS low for that entire time.



Joseph Wu

Hello joseph,

i checked the data on oscilloscope, now i am getting some value, ani after decreasing or increasing pot , value also changes.

now i want read the 2 s configure data into decimal form,

i am reading data in 8 bit register.

please tell me the way of reading data.

thanks a lot in advance

Hi joseph,

please tell me how to read the 2s complement data .

and after what time need to read it

Hi joseph,

please tell me how to read exact data , and convert it into decimal,its very urgent . please help me for this.

thanks in advance

Hi joseph,

i am facing one problem regarding cs line, 

for 16 bit transmiision as mentioned in datasheet, we have to make cs high after 16 th cloclk pulse, if i am doing this , then cs not runs properly means it is getting high in betwwen middle of 16th clock pulse ,

so please explain hoe to control cs .

Avanti,

Can you show what is happening with a oscilloscope shot of the communications? For the /CS line, it should stay low through the entire communication transmission. If the /CS goes high before all the SCLK pulses come through, this is not a problem with the device, this is a problem with programming the microcontroller.

Regardless, post the SPI communication (all lines /CS, DIN, DOUT, SCLK) and we can discuss the problem.

Joseph Wu

HI ,

Can you please tell me, how to extract main data from raw data,means want to know about resolution.

Avanti,



The conversion of the data from the ADC is described in the datasheet in the Data Format section on page 17. The data is put in binary twos complement format that is left justified within the 16-bit data word. A positive full-scale (+FS) input produces an output code of 7FF0h and a negative full-scale (–FS) input produces an output code of 8000h. The data comes in from SPI on the falling edge of the SCLK. When I asked about the raw data, I wanted to know about what that 16-bit number is, and what FSR you are using.

As I mentioned in a previous post, I'd like to see the communication from the ADC with an oscilloscope. I've already given an outline as to how to make the conversion. However, it might be easier if you showed a plot of a scope shot, with the SCLK, DIN, DOUT and /DRDY. With that, we could look at the resulting data and show the conversion.



Joseph Wu

hi joseph,

u have defined how to convert data  into voltage, these above all stages have 2s complement conversion step also.

hi joseph,

i am sending 0x421B , THIS 16 BIT VALUE TO ADC,them immediately reading data,

below is my code

my FSR is 4.096

DSPI_B.PUSHR.PUSHR.R = (uint32_t)((uint32_t)(cmd<<16) + data);
DSPI_B.SR.B.TXRXS = 1;
response = DSPI_B.POPR.R;

i am reading data from pop register, 

i am attaching my dso data, first one is cs, clock ,and data in to adc,  and last one data out from adc.

due to probe prblem it is little bulky,

and i am not getting any constat data value, continuosly it is changing,

please tell me after what time i should read data?

thank you so much for in advance

Hi joseph,

i want to understand the above steps

the step 4a  and 4b ..i am not getting  these steps. please explain me.

one more question .. at what stage i will get the full count 4096.

hi joseph,

my vref is 5v and my pot max voltage is 3.5v

when i remove last 4 bits from data .i am getting 1160 value ,this is 12 bit value .

so this is  wrong or right , i am not getting, and how to proceed again this value to main data.

Hi joseph,

today i have multiple questions. i have below doubts.

my FSR is 6.144

pot max voltage is 3.5

1. first thing please tell me we are getting 16 bit value , so last four bits should be 0 or it will read.

for  3.008 v

when i am reading pop register its value is A90 IN HEX, and 2704 in decimal

if i remove last four bits then it is A9 means 169 value.this value is constant at any time,but if my pot voltage decreases from 3.008 to 3.004 then i am getting 589 value ,due to little fluctuation . lots of difference in count

1.FSR =6.144 INPUT VOLTAGE 3.008 , DATA=169 IN DECIMAL(12 BIT)

2. FSR =6.144 INPUT VOLTAGE =3.004 DATA =585 IN DECIMAL(12 BIT)

HOW IT IS COMING PLEASE EXPLAIN ME

2 . ANOTHER IS in datasheet it is written that data will be in binary 2s complement form.

so the above data is in 2s complement or final data.

i am not understanding the data i am getting is in normal or 2s complement so need to convert it?? or not

please please help me for this,

thanks a lot in advance.

1.FSR =6.144 INPUT VOLTAGE 3.506 , DATA=1316 IN DECIMAL(12 BIT)

this above data 1316 is in which format.

these are above reading.please help me for this.