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ADS8904B: SCK capacitance

Elisha Tarroza71
Expert 3700 points

Part Number: ADS8904B

Hello,

Can we please request for the expected input capacitance of the SCK pin?

Also, by adding a series resistance to the SCK input, can it possibly reduce/prevent the SCK clock noise from coupling to the ADC inputs?

Thank you!

  • 0
    TI__Guru 51460 points

    Hello Elisha,

    The digital input capacitance is included in the IBIS model.  You can download it here:

    http://www.ti.com/lit/zip/sbam305

    Open this file in a text editor, and you can find the capacitance for the specific IO pins.

    It looks like input capacitance C-comp is 0.38pF, and the package capacitance is 0.2pF.  You will probably have an additional 1pF of capacitance due to the board as well.

    Yes, adding a series resistance can reduce SCLK noise.  We usually include series resistors (50ohm) on all of the digital control lines on the TI EVM's just in case. Many times they are not needed, but depending on the board layout and the MCU/FPGA drive strength, there are cases where these resistors are very helpful.

    Regards,
    Keith Nicholas
    Precision ADC Applications 

  • 0 in reply to Keith Nicholas
    TI__Expert 3700 points

    Thanks a lot, Keith! One more question though -- does that mean that the total input capacitance of the SCK pin is the sum of all three?

  • 0 in reply to Elisha Tarroza71
    TI__Guru 51460 points

    Hello Elisha,

    The input impedance is more complex, with resistance and inductance as well as capacitance.  However, for a simplified analysis, I normally just add all of the individual capacitance values.  Using this total capacitance value, and any external series resistance, will give an estimation on rise/fall times.

    Thanks,

    Keith