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DAC3154EVM: Getting simple output from board.

Part Number: DAC3154EVM
Other Parts Discussed in Thread: DAC3154, DAC3174, TRF3705

Hi, I am trying to use the DAC3154 Dual-Channel, 10-Bit, 500-MSPS Digital-to-Analog Converter Evaluation Module. I connected the a 10 MHz clock to CDCE input.Using the DAC3174_v1p2.vi software I configured

"Output1_DAC CLK" as enabled. Source= primary. Signal type=LVPECL.

"Output2_FIFO_OSTR" enabled. Source=primary and signal type=LVDS.

I get no output from the DAC board from these settings, only noise. How to get a simple output from this board?

  • Hi Shehryar,

    One of our device experts will be back with you soon.

    Best Regards,

    Dan

  • Sheyryar, 

    Can you give a little more detail about your setup? Please include a brief description of your hardware setup. Are you using a tsw1400 evm with the dac evm? What are all the inputs you have connected to the dac evm? What is the desired clocking rate?

    Yusuf

  • Hi Yusuf,

    I am not using the tsw1400 EVM. I'm only testing the DAC board and trying to get a simple sin wave output at port J15 being driven by a clock input at port J9. I'm clocking it at 10 MHz. When I connect J15 to an oscilloscope I only see noise. What sort setup do you recommend for obtaining a sin wave output being driven by a arbitrary clock input? 

  • Sheryar, 

    Have you referenced the user guide for this board? 

    http://www.ti.com/lit/ug/slau466a/slau466a.pdf

    Yusuf

  • Yes, I set it up with the input parameters ( Clock signal voltage)  and software settings described in the user guide. It still wasn't working. 

  • Shehryar:

    You may not have the HW set-up complete in order to see the DAC output signal.  Reference figure 6 in the DAC31x4 User's Guide.  You will need the TSW1400 board to use as a pattern generator.  This will generate a signal to transfer to the DAC.  If you do not have this, then there will be no output signal.  On the EVM, the DAC BB outputs are routed to a quadrature modulator (TRF3705).  The TRF3705 needs an external LO signal input at J13 connector.  At a minimum, you should see the LO bleed-through at the output of the modulator at J15.  With a 0 dBm input signal, the LO bleed-through will come out around -40 dBm or so.

    The concept is to generate a quadrature digital low-IF signal using HSDC Pro GUI software.  This software is available on TI.com.  The software interfaces with the TSW1400 EVM to transfer the digital pattern to the FPGA and then send it to the DUT.  For example, if you set the low-IF to 10 MHz and the LO to 2 GHz, I would expect a signal at the output at 2.01 GHz.  Note, you will also see a lower signal at 2 GHz (LO Bleed-through) and 1.99 GHz (image).  You need to measure this with an RF spectrum analyzer since the frequencies are high.

    --RJH