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ADC32RF44EVM: KCU105 vs ADC32RFXX EVM GUI configurations

.DT
Prodigy 50 points
Part Number: ADC32RF44EVM
Other Parts Discussed in Thread: ADC32RF44, , LMX2582, ADC32RF45

Hi,

We currently have ADC32RF44EVM attached to a KCU105 and have downloaded the KCU105 + ADC32RF44 Design Firmware from the TI website.

We have the ADC32RFXX EVM GUI configured with the following settings in the Quick Setup Tab:

  • Nyquist Zone = 2nd Nyquist
  • Clock Source to ADC = LMX2582 to ADC
  • Internal Clk Freq = 2457.6 Msps
  • ADC32RF45 Mode = Bypass
  • Resolution = 14 bit

There are no external clock being provided into the ADC32RF44EVM.  When you look at the clock output for CLKout 0 it equates to 307.2 MHz. When we open up the KCU105 firmware, the JESD204 PHY Reference Clock is expecting a 192 MHz input.  When everything is hooked up and we review the KCU105 LEDs on the Vivado ILA everything appears to be fine.  Can someone explain why the KCU105 is syncing and receiving data when the clock it's expecting is not what it is getting.  I've also changed the configuration of the GUI to use an Internal Clk Freq of 1536 and generated a 192 MHz clock output on CLKout 0 but that results in the KCU105 no longer syncing to the ADC.

Thanks!

DT

  • 0
    TI__Genius 10505 points

    Hi DT,

    We are looking into this. Will get back to you ASAP..

    Regards,

    Vijay

  • 0 in reply to Vijayendra Varma Siddamsetty
    TI__Genius 10505 points

    Hi DT,

    KCU105 + ADC32RF44 Design firmware is compiled for maximum lane rate of 7.68 Gbps with 192MHz (x40) clock as the expected Reference clock form the ADC.

    So it is recommended to use 192 MHz clock.

    1. How firmware works fine for Reference clock of 307.2 MHz clock?

    With 307.2MHz(x25) (still a valid reference clock to JESD PHY as shown above), firmware may to lock BCBC and SYNC might get established. But this link might not be consistent and there is a high possibility of data integrity issues that may occur over multiple captures. Since the firmware is compiled for 192 MHz .

     

    2. Why firmware not syncing for 192 MHz - recommended Reference clock?

    Firmware is expected work fine for 192 MHz .  Please Verify when the ADC GUI is configured to change CLKout0 to 192 Mhz (from 307.2 Mhz), all the necessary configuration are done AGAIN as mentioned in the KCU105 ADC32RF44 Reference Design User Guide (located at C:\Program Files (x86)\Texas Instruments\KCU105 Firmware\ADC32RF44 8224\Source Code).

    Regards,

    Vijay