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ADS54J20EVM: How to do confirm the ADS54J20EVM work normal

Part Number: ADS54J20EVM
Other Parts Discussed in Thread: LMK04828, ADS54J20

Hi,

   According to user guide description i setup the ADS54J20EVM,there are some questions trouble me:

1,When the ADS54J20EVM power-up,the current is 760mA usually,but sometimes is 960mA,it is normal?

2,The user guide description after config board the current is 1.35A,but when i load the LMK04828 config file the current is 1A,after loading the ads54j20 config file the current is down to 700mA,but the PLL2 is locked

As the above problem how can i confirm the ADC is ok?

Another question user guide does not mention the ref clk of LMK04828,how do i choose the ref clk?the external clk or on-board clk?and the vaule?

Thanks!

  • Suy:

    The current variations reported do seem strange.  As you mention, the UG reports that initial current is 0.66A and final configured current as 1.35A.  Double check the voltage that is actually at the board and that you have the supply for the EVM separated from the TSW14J56EVM.  It is possible that voltage variations at the board itself, perhaps through current limits on the supply or large voltage loss on the cable, are creating some unexpected results.  The bottom line, however, is if you can get a legitimate capture to see if the device is operational.  From the description above it looks like the LMK is operational and it is unclear if by following the rest of the UG that you are able to get a proper data capture.

    The LMK reference is intended to synchronize the LMK clock to external test equipment. It is not absolutely necessary, but is required if coherent sampling is desired.  A typical reference frequency is 10 MHz.  I suspect the LMK configuration is set-up for that reference frequency though it is possible to program it to something different if you had a different system reference signal.

    --RJH

  • Hi,RJH,

    I think I have found the problem. The configuration file described in the ads54j20evm document is named lmk_config_onboard_983p04_msps.cfg, so I think the default CLK output of on-board crystal oscillator.So is the default operating mode for EVM the onboard VCXO mode?

    According to your reply, if I want to drive the ADC to run in external CLK mode, do I just switch to external CLK of 10M?

    [update] when I switched from the signal generator to the external CLK and downloaded the configuration name for lmk_config_external_clock.cfg, LED2 did not light up, indicating that PLL2 locking had failed.So I can't find a solution, so how do I work in external ref clk mode?

    -------------------------------------------------- --------------------

    In the onboard VCXO mode, the input signal is 160MHz. I download lmk_config_onboard_983p04_msps.cfg, and then open HSDC sampling when the ADC output data rate is set to be greater than 491.52M,the sampled fundamental is greather than 160MHz ,and the D4 is put off,D3 is keeps on,why it is hanppen?

  • Suy,

    To operate in externa; clock mode, apply a clock source with about 10dB of amplitude to SMA J6.  Load LMK_config_ext_clk.cfg, then press the rest button, then load the desired ADC config file. Since the PLL of the LMK is not used in this mode, LED2 will not turn on.

    If the data rate you enter in HSDC Pro does not match the actual data rate, the software calculations will be incorrect  and will display the results in the wrong location because of this. It appears you have the wrong clock setting used for the screen shots you show above. Always press the board reset button after loading a new LMK config file but before loading the ADC config file.

    Regards,

    Jim

  • Jim,

       1,In external VCO mode the LMK04828 does not use PLL2,it mean that the input clk source is high frequency?but i find the Fin input range is 0~750MHz

       2,The ADC output data rate match the actual data rate,which means the rate is the same as the sample rate of ADC?When set the ADC output data rate is less than sample rate the data can be ouput,am i right?

       3,When i load the 819.2M/983.04M/1024M config file and set the ADC ODR is the same as 819.2M/983.04M/1024M,the sampled fundamental wave frequency is no right,but load the 122.88M/245.76M/491.52M config file the fundamental wave is right(input signal is 30MHz)

  • Suy,

    There should be no issues when sampling at the different clock rates and using a 30MHz IF input. See test results attached.

    Please follow the steps shown in this attached document.

    Make sure the ADS54Jxx GUI is version 1.8.

    Make sure to use HSDC Pro GUI version 5.0

    The ADC EVM should be a Rev D board with a 122.88MHz VCXO. The TSW14J56EVM should be a Rev D.

    If you are still having problems after following the steps and verifying the info provided, you may need to request a new ADC EVM.

    Regards,

    Jim 

    ADS54J20_Int_CLk_IF_30M.pptx

  • Hi jim,

       I try to do download all the config according your document can work,but load the 122.88M config file,the D3 is always lit and D4 is always put off whic looks like unnormally,did the config file is not correct?what can i do others operation to make the EVM works normal.

       Another question,the  analog input frequency can be lower than 100Khz?I found the input frequency below 100Khz the ADC sampled the fundamental wave is not correct.

  • Suy,

    Per the data sheet, the minimum sample rate for this ADC is 250MHz. You are trying to use 122.88MHz, which is to slow. This is why you are getting this error message.

    Regarding your other question, the board uses an ADT1-1WT+ transformer from Mini-Circuits which has a range from 400KHz to 800MHz. With signals lower than 100KHz, the transformer will be attenuating the amplitude. If you need to operate at a low frequency, you will need to change out this transformer with a lower frequency range part. Another option would be to setup the board to use differential inputs and drive the inputs with a low frequency differential amplifier.

    Regards,

    Jim   

  • Jim,

       The transformer which EVM used impedance is 75Ω ,so if i want to change a lower frequency range part that  the impedance is also 75Ω? Can i adjustment the resistance capacitance network to change the impedance ?

  • Suy,

    The difference between a 50 Ohm and 75 Ohm transformer is negligible enough not to matter. The network on the EVM is designed for 50 Ohm impedance. You can probably use either one and not notice much difference. The 3dB insertion loss point for the ADT1-6T from Mini-Circuits starts at 30KHz. This may work for your application.

    Regards,

    Jim 

  • ok,i have got all of these questions。

    Thanks for you.