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ADS5263EVM: The maximum input frequency of J31 is 50MHz?

Part Number: ADS5263EVM
Other Parts Discussed in Thread: ADS5263

Hi,

When I read the datasheet of ADS5263, it captures the input signal at the both rising and falling edge of CLKP(CLKM). So, when I use a single-end input J31 of ADS5263EVM for feeding this clock, the maximum input frequency of J31 is 50MHz. Is this correct?

I wanted to use this ADC at 100MSPS, so I fed 100MHz of sine wave in J31 at first time. I'm afraid that this breaks the ADC or not, since I thought feeding 100MHz into J31 makes the ADC to sample at 200MSPS.

Best regards,

Yoshitaka

  • Thank you for using ADS5263EVM!

    We will reply to you very soon.

    Thank you!

    Best regards,

    Chen

  • Hi,

    The input J31 is connected to a transformer

    which creates both (at the same time) rising edge to CLK+ (CLKP)

    and falling edge to CLK- (CLKM) at the same timing (the same frequency) as well.

    Therefore, if your input signal is 100MHz connected the J31

    and then the clock input CLKP and CLKM will have the same frequency speed 

    but with the different clock edges.

    Thank you!

    Best regards,

    Chen

  • Hi Chen,

    Thank you for the reply!

    Then it follows that the sampling frequency of ADC is 100MHz if the input signal of J31 is also 100MHz. I'm relieved to hear that because my board seems not damaged.

    Best regards,

    Yoshitaka