Hello,
We have found that the double-read SPI mechanism to read from the AMC8712 is causing us an issue. We are using a Linux OS which has it's own SPI driver but with our own user-space controlling the Chip-Select (CS) line.
Sequentially we pull the CS low, perform a single read operation, then pull the CS high and repeat this sequence to get data from a AMC7812 register. When we view the a single transaction on the scope we see CS go low (correct), Clk go low then toggle with MOSI and MISO data as expected...then we see CS go high before the Clk line is driven high by the linux kernel. Strange that Clk stays low longer than CS but it works!
What's even more baffling is that sometimes we see CS go low (correct), Clk, MOSI and MISO toggle as expected...then we see Clk go high before the CS and in this case the data back on the MISO line is always 0's. This is happening even when we read from register 0x6C which should always read 0x1220.
Why would CS going high after Clk cause an issue? What could the AMC7812 be doing that returns 0 when it's gated with 24 clock cycles and the correct MOSI register address?
