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AMC1306M25: Minimum delay in Sinc3 mode with C2000

Part Number: AMC1306M25

Hi team,

I am helping my customer survey C2000+ sigma delta modulator in their next gen platform. 

The main concern is about the delay of AMC1306. In order to achieve 12bit resolution, they need to run AMC1306 in Sinc3 mode with 64 OSR, which makes the delay about ~9us. 

I noticed in some of our products(eg. ADS124X), we have an one-cycle update feature, which would help to reduce the delay of SINC3 filter. I would like to know if it is possible to achieve this on AMC1306 with C2000?



  • Hi Brian,

    The single-cycle settling refers to settling the digital filter after seeing a transient spike due to switching of the multiplexor between input channels. Without waiting for the digital filter to settle, the transient spike data will be decimated along with the actual measurement data, leading to an invalid measurement. Since the data-rate of the ADSS124X products are relatively slow, waiting for the transient spike to pass through the digital filter is achievable in a single-cycle before the next round of data is ready. 

    For the AMC1306, I do not believe that this will be quite the same since it is a single-channel device. While the digital filter will still need to settle on power-up and transients - what I think the customer is really interested in is protection. I would recommend that they feed the digital bitstream from the AMC1306 to two delta-sigma filter modules on the C2000. One module can be configured as you said, Sinc3 & 64 OSR which can be used for the measurement feedback loop. They can feed the same bitstream to an additional delta-sigma filter module with a much faster digital filter response, for example Sinc3 and 8 OSR which has a settling time of 1.2uS. For even faster response a Sinc1 or 2 filter could be used.  

    Table 2 in this app note may help: