Hi,
I'm trying to use this DAC as shown in the circuit below
When I measure the tespoints 8.9,10 and 11 I see -3V and output of the DAC is 0V.
SPI signals seem fine. This is what I see
SPICLK and SPIMO
SPICLK and SYNC
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Hi,
I'm trying to use this DAC as shown in the circuit below
When I measure the tespoints 8.9,10 and 11 I see -3V and output of the DAC is 0V.
SPI signals seem fine. This is what I see
SPICLK and SPIMO
SPICLK and SYNC
Hi,
First of all can you probe all signals together and send me clean scope plots to validate the frame.
Also how are you generating 3V reference for the device? Is this coming from a buffer? we need to drive this reference pin with very low impedance source as device doesnt contain any buffer and input impedance on this pin is 30K.
Also make sure that SYNC is not brought high before 16th SCLK fall edge, I am not able to see that timing from your scope shot. Please allow SYNC to stay one more SCLK low and bring it back to high for a check.
whats the Data bits (16bit ) you are feeding into DAC? is it 0x18FF ?
Regards,
AK
Hi,
Thanks for these plots.
Can you probe Reference with a scope and meter when you are doing these test? I have a suspicion that your reference may not be stable and its drooping.
Regards,
AK
Hi,
Your schematics and reference looks fine to me, other than in the EVM we have-used 4.7uF along with 100nF cap on Reference pin, ideally it should not matter. a 0.1uF cap is enough.
Can you try the following,
Input 0000 to DB[15:12] to go into normal operation mode.
Input 800 to DB[11:0] to output Vref/2
Let me know this helps.
Regards,
AK
Hi,
Any update on the test after doing the above suggestions?
Let me know if you need more help.
Regards,
AK