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DAC7750: About the output level.

Guru 10385 points
Part Number: DAC7750

Hi team.

My customer is seeing the same input but different output.

The system load is 200Ω.

Ch1 : 17.2V(86mA)

Ch2 : 1.27V(6.8mA)

They are the circuits at output that referenced the data sheet(p.39 fig,62).

  

I have some question about this phenomenon.

1. Is this the output error?

 Is the internal circuit damaged because the output is obviously high?

2. If it is the output error, Could you guess the cause of the error?

3. They were touching the wiring directly with a tester to check the output voltage.

     Will it cause a malfunction?

Sincerely.

Kengo.

  • Hello Kengo,

    Can you provide a schematic diagram of this 2-CH design? Even though it is based on fig 62, I'd like to inspect it for any clues about what could be causing the issue.

    Also, can you provide an exact sequence of SPI commands sent to the devices after power up? For example, what code is written to the data register? 

    Certainly, this is not the expected behavior of the DAC7750 and with additional information about the design, we can figure out what the problem is.

    Thanks,

    Reza

  • Hi Reza.

    Thank you for your reply.

    Can you provide a schematic diagram of this 2-CH design? 

     →Ch2 was made it by referring to the fig 56 in data sheet(p.30).

           R1:1kΩ , R2: 20Ω

    Also, can you provide an exact sequence of SPI commands sent to the devices after power up? For example, what code is written to the data register? 

     →I'll check to my customer.

           Does that mean SPI commands needs a sequence?

    Sincerely.

    Kengo.

  • Hello Kengo,

    The designs in both figures 56 and 62 have been tested multiple times with no issues so I doubt the issue is due to the circuit architecture. No specific sequence of SPI commands should cause abnormal behavior. 

    I requested the schematic and SPI sequence information just to gather as much info as possible to think about what may be happening. Both pieces of information would be crucial to help us debug the possible issue. 

    Can you also provide some more information about AVDD level, what current range was used, VREF status, IQ observed on AVDD, etc? Any additional information will help. How often is this issue occurring? Have they tried swapping the units on the boards and retesting?

    Thanks,

    Reza

  • Hi Reza.

    I'll talk to my customer about what you said.

    By the way, I found something interesting in the description of the data sheet.

    According to the data sheet at p.29 8.2.3,

    It decreases the gain of  the stage created by the BJT and internal R3 resistor especially for cases where RLOAD is a short  or a very small load, such as a multimeter. 

    My customer uses a multimeter to measure.

    Is there anything that could cause this malfunction?

    Sincereky.

    Kengo.

  • Hello Kengo,

    Using the external boost transistor adds another feedback loop to the system (IOUT to BJT base to BJT collector/ Boost pin and back to IOUT). R3 resistor is used to ensure that gain of this loop is reduced and by extension, the stability of this secondary loop is maintained. 

    Again, I haven't experienced any situation where this caused a malfunction. I'll wait for additional input from your customer so we can debug this further. Thanks.

    Regards,

    Reza