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Hello,
In section 6.1.1.3 of the Delta-Sigma ADC EvaluaTIon Software User's Manual it mentions you can save a header file to be used for firmware project, however, in my software program I am missing the option at the top next to "Load" to do so:
Could you help me figure of how to get the header file?
Hi Mariah,
Welcome to the E2E forum! Unfortunately this is a feature no longer available in the GUI and due to an oversight the user's guide was not updated at the time.
As for the header file, it is not that complicated of a device as it only has 4 registers. Here is something similar to what would have been generated by the GUI.
#ifndef ADS122C04_H_ #define ADS122C04_H_ /* * Generic and common library headers */ /* Number of registers defined for the ADC */ #define NUM_REGISTERS 4 /**< Number of registers available in the device. */ /* * Address masks used for register addressing with * either a REGRD of REGWR mask * */ #define CONFIG0_ADDR_MASK 0x00 #define CONFIG1_ADDR_MASK 0x01 #define CONFIG2_ADDR_MASK 0x02 #define CONFIG3_ADDR_MASK 0x03 /* Opcode masks */ #define NOP_OPCODE_MASK 0x00 /**< Command for a no operation. */ #define PWRDN_OPCODE_MASK 0x02 /**< Command for a device power down. */ #define RESET_OPCODE_MASK 0x06 /**< Command for a device reset. */ #define START_OPCODE_MASK 0x08 /**< Command for starting or synchronizing a conversion. */ #define RDATA_OPCODE_MASK 0x10 /**< Command for reading the last conversion result. */ #define REGRD_OPCODE_MASK 0x20 /**< Command for reading a register. */ #define REGWR_OPCODE_MASK 0x40 /**< Command for writing a register. */ /* Register sub masks */ /* ADS122C04 Register 0 Definition */ /* Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 */ /*-------------------------------------------------------------------------------------------- */ /* MUX[3:0] | GAIN[2:0] |PGA_BYPASS*/ /* Define Mux */ #define ADS_MUX_0_1 0x00 /**< AIN0 and AIN1 input pair. */ #define ADS_MUX_0_2 0x10 /**< AIN0 and AIN2 input pair. */ #define ADS_MUX_0_3 0x20 /**< AIN0 and AIN3 input pair. */ #define ADS_MUX_1_0 0x30 /**< AIN1 and AIN0 input pair. */ #define ADS_MUX_1_2 0x40 /**< AIN1 and AIN2 input pair. */ #define ADS_MUX_1_3 0x50 /**< AIN1 and AIN3 input pair. */ #define ADS_MUX_2_3 0x60 /**< AIN2 and AIN3 input pair. */ #define ADS_MUX_3_2 0x70 /**< AIN3 and AIN2 input pair. */ #define ADS_MUX_0_G 0x80 /**< AIN0 to AVSS SE input. */ #define ADS_MUX_1_G 0x90 /**< AIN1 to AVSS SE input. */ #define ADS_MUX_2_G 0xA0 /**< AIN2 to AVSS SE input. */ #define ADS_MUX_3_G 0xB0 /**< AIN3 to AVSS SE input. */ #define ADS_MUX_EX_VREF 0xC0 /**< External reference input. */ #define ADS_MUX_AVDD 0xD0 /**< (AVDD-AVSS)/4 input. */ #define ADS_MUX_DIV2 0xE0 /**< Shorted input at (AVDD-AVSS)/2. */ /* Define Gain */ #define ADS_GAIN_1 0x00 #define ADS_GAIN_2 0x02 #define ADS_GAIN_4 0x04 #define ADS_GAIN_8 0x06 #define ADS_GAIN_16 0x08 #define ADS_GAIN_32 0x0A #define ADS_GAIN_64 0x0C #define ADS_GAIN_128 0x0E /* Define PGA bypass */ #define ADS_PGA_BYPASS_ENABLE 0x01 #define ADS_PGA_BYPASS_DISABLE 0x00 /* ADS122C04 Register 1 Definition */ /* Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 */ /*-------------------------------------------------------------------------------------------- */ /* DR[2:0] | MODE | CM | VREF[1:0] | TS */ /* Define data rate options */ #define ADS_DR_20 0x00 #define ADS_DR_45 0x20 #define ADS_DR_90 0x40 #define ADS_DR_175 0x60 #define ADS_DR_330 0x80 #define ADS_DR_600 0xA0 #define ADS_DR_1000 0xC0 /* Define speed mode */ #define ADS_MODE_NORMAL 0x00 #define ADS_MODE_TURBO 0x10 /* Define conversion mode */ #define ADS_CM_SS 0x00 /**< Single-shot conversion mode. */ #define ADS_CM_CONT 0x08 /**< Continuous conversion mode. */ /* Define reference selection */ #define ADS_VREF_INT 0x00 #define ADS_VREF_EXT 0x02 #define ADS_VREF_AVDD 0x06 /* Define temperature sensor usage */ #define ADS_TS_OFF 0x00 /**< Internal temperature sensor off. */ #define ADS_TS_ON 0x01 /**< Internal temperature sensor on and used as ADC input. */ /* ADS122C04 Register 2 Definition */ /* Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 */ /*-------------------------------------------------------------------------------------------- */ /* DRDY | DCNT | CRC[0:1] | BCS | IDAC[2:0] */ /* DRDY is read only */ #define ADS_DRDY 0x80 /* Define data counter usage */ #define ADS_DCNT_DISABLE 0x00 #define ADS_DCNT_ENABLE 0x40 /* Define data integrity usage */ #define ADS_CRC_DISABLE 0x00 #define ADS_CRC_INVCONV 0x10 #define ADS_CRC_CRC16 0x20 #define ADS_CRC_RESERVED 0x30 /* Define burnout current sources */ #define ADS_BCS_DISABLE 0x00 #define ADS_BCS_ENABLE 0x08 /* Define IDAC current */ #define ADS_IDAC_OFF 0x00 #define ADS_IDAC_10 0x01 #define ADS_IDAC_50 0x02 #define ADS_IDAC_100 0x03 #define ADS_IDAC_250 0x04 #define ADS_IDAC_500 0x05 #define ADS_IDAC_1000 0x06 #define ADS_IDAC_1500 0x07 /* ADS122U04 Register 3 Definition */ /* Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 */ /*-------------------------------------------------------------------------------------------- */ /* I1MUX[2:0] | I2MUX[2:0] | RESERVED | RESERVED */ /* Define IDAC 1 current routing */ #define ADS_IDAC1_OFF 0x00 #define ADS_IDAC1_AIN0 0x20 #define ADS_IDAC1_AIN1 0x40 #define ADS_IDAC1_AIN2 0x60 #define ADS_IDAC1_AIN3 0x80 #define ADS_IDAC1_REFP0 0xA0 #define ADS_IDAC1_REFN0 0xC0 #define ADS_IDAC1_RESERVED 0xE0 /* Define IDAC 2 current routing */ #define ADS_IDAC2_OFF 0x00 #define ADS_IDAC2_AIN0 0x04 #define ADS_IDAC2_AIN1 0x08 #define ADS_IDAC2_AIN2 0x0C #define ADS_IDAC2_AIN3 0x10 #define ADS_IDAC2_REFP0 0x14 #define ADS_IDAC2_REFN0 0x18 #define ADS_IDAC2_RESERVED 0x1C #endif /* ADS122C04_H_ */
We currently do not have example code for the ADS122C04, but the code itself will primarily depend on the hardware configuration for the micro you intend to use and would not be a part of the example code itself.
If you are writing code, I would suggest following the datasheet communication flow. If you have any questions feel free to create a new thread and post again.
Best regards,
Bob B
