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ADC101S051-Q1: When delay time cannot be set for CS and SCLK.

Part Number: ADC101S051-Q1

Hi TI-team.

My customer cannot set the delay time for CS and SCLK due to the restrictions of the microcomputer used as the master. (CS and SCLK become Low at the same time.)

What are the harmful effects if the tSU time cannot exceed 10ns ?

 

Best Regards,

Koji Hayashi