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DAC5672: Sinusoidal Wave Noisy Output

Part Number: DAC5672

Hi, I am using DAC5672 part in my custom board, providing the digital data input to the DAC from the Xilinx Artix-7 FPGA.

  1. 14-bit Sine Wave digital data is fed to the DAC from FPGA.
  2. The DAC is used in Dual Bus mode, only Channel A is being used.
  3. The input data rate to DAC is 40MSPS; 16 points per sine wave; analog frequency of sine wave is 2.5MHz.
  4. The DAC Sampling Clock Frequency is 80MHz, which is fed from the FPGA only.
  5. The "CLOCK" as well as "WRITE_ENABLE" signal are same, continuous free running clocks.

The analog output of the DAC is noisy, having glitches. The oscilloscope snapshot of the same is attached for the reference.

Also, the schematic of the DAC is attached for the reference. 

Referring to the below schematic, the input bits DA0......DA13, WRTA, DAC_CLK in the schematic are directly routed from the FPGA. The 100ohm "R48" resistor at the input of the transformer is omitted. The output of the DAC is probed at  "DAC_OUT" net, the output of the 1:1 transformer.

Need help in debugging and resolving the issue.

Thanks.

  • Hi Rishabh,

    It looks like setup and hold issue between the data on data clock coming from the FPGA. Can you please try to delay the either data clock or the data coming from FPGA and see if you are able to see clear sinewave. Also why is data rate and sampling frequency not the same? Your data rate is 40Msps and sampling frequency is 80Msps?

    Regards,

    Neeraj