Other Parts Discussed in Thread: DAC3482
Hello,
My customer has one question on DAC3484 as below,
The design bandwidth is 220MHz at the widest. According to the DAC's FIR filter bandwidth design, the customer have to use a data rate of 307.2MPSP.
Previously they used DAC3482 with word-wide format mode, then DATACLKP/N (DDR) should be 307.2MPSP, D[15:0]P/N should also be 307.2MPSP. The block diagram is as follows:
Now they need to use DAC3484 with all 4 channels (ie two sets of IQ complex signals), according to the block diagram, do they need to upgrade both DATACLKP/N (DDR) and D[15:0]P/N to 614.4MPSP to meet the requirement of 307.2MPSP for the data rate of each IQ complex signal?
Regards,
XG