I am using a custom board with an ADC12J4000 and an Arria10 FPGA.
I use the ADC to capture a PRBS modulated signal (@409MSPS), then I do a BER on the samples to check for errors.
I noticed that when the acquisition/jesd is running, if I do an SPI read to check ADC12J4000 status, sometimes an error appears in the stream.
Is it a known issue with this ADC ? I shouldn't use SPI while jesd is running ?
Or is it an issue with my board / spi ?