Hello,
The DAC3484 has 4 DACs and hence 4 analog outputs are possible. What is the maximum signal bandwidth possible from any one channel? Is it possible to generate a 100MHz wide signal from a single channel.
I understand that signal bandwidth depends on a lot of things so in less ambiguous terms can I generate 100 tones spaced 1MHz apart from a single DAC?
2) How does this translate to the DAC sampling rate and the digital interface data rate? (FPGA to DAC)
The minimum sampling rate for a 100MSps signal would be 200MSps. Simultaneous operation on all 4 channels at this rate requires 200 x 4 = 800MSps. Since each sample is 16 bits and the digital data interface is 16 bits wide, the FPGA will have to send data at 800Mbps (LVDS interface). Since it is a DDR interface the FPGA will have to generate the data at 400MHz for each channel. I am a bit confused here.
Please guide on where this information is provided in the datasheet.
3) Is this bandwidth simultaneously possible on all 4 channels.
Thanks for your answers,
