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ADS8167: Not getting recognizable consistent data from SDO

Part Number: ADS8167

Im prototyping a design.  The ADS8167 is hand-soldered to a QFN adapter.  The part is on a breadboard attached to a Nucleo H743Z.  I am not getting recognizable data on the SDO line.  I know this is my problem - Im just wondering if this SDO pattern is familiar to anyone. 

The SDO line is inconsistent.  I havent been able to find a regular pattern.  I have read other comments.  My lines seem to be at the right voltage:

Pin 3 - REFIO Voltage: 4.11

Pin 2 - DeCap voltage: 2.75

Pin 29 - Reset voltage: 3.28

The Ready line seems to follow Reset and SS like it should.

basic schematic and logic analyzer traces attached.  Excuse my lame schematic.  Logic analyzer traces that Im attaching are NOP commands.  I cant get valid data when I read.  What I find interesting is that *sometimes* the SDO line goes high during the NOP.  I have other traces, but thought this would be a good starting point.

Any help gets a beer if you are in the Bay Area Ca.


  • Hi Larry,

    Thank you for your post and for the beer offer. :)

    Our primary support for the ADS8167 is out of the office this week. I can take a look through this today and try to offer some helpful advice.


  • Hi Larry,

    Some follow-up questions below:

    1. REFIO = 4.11 V is slightly beyond the max spec. Do you have REFIO configured as an internal reference output? May be more of a measurement artifact due to soldering or probe GND connection
    2. DECAP = 2.75 V is slightly below the nominal value (2.85 V) but also may not be a concern.
    3. Which interface mode are you using? There is a maximum 15 ns requirement between /CS falling edge and READY falling edge. It looks like the two signals are aligned, but just confirm that /CS is not coming before READY by more than 15 ns.
    4. Can you provide the register settings you are using?
    5. How are your inputs configured (single-ended or differential)? Can you apply a known input voltage (i.e. mid-supply) that would force a known output pattern on SDO?

    Best regards,

  • I am unable to configure it yet - so right now,  I just power it up, and try to set the reg_access to write_ena.  I try to read that register after I set it, and so far, Im unable to get anything consistent on my read.  I guess Im unable to write as well. I read/write lots of other SPI devices, using this same eval board, so I know I can...  Currently, this is the only device on the SPI interface.

    I uploaded a few logic analyzer traces of me trying to read/write

    I could apply some voltage to the input lines. 

    Im really just trying to get a basic write/read cycle to give me consistent data.  Like I say, even if I just do consecutive NOP commands, the SDO line does not give me what I would expect.