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ADC32RF45EVM: From ADC32RFXX EVM GUI LMK04828 configuration

Part Number: ADC32RF45EVM
Other Parts Discussed in Thread: LMK04828, ADC32RF45, LMX2582,

We are using ADC32RFXX EVM GUI for configuring LMK04828 in our customized ADC32RF45 Board.We are getting proper clock input to LMK04828 from onboard crystal but DCLK clock is not coming out.We used DCLKOUT0 for the reference clock of FPGA.We are mounting FMC based ADC Board to our FPGA.Here are the details of clock and RF signal frequency for the setup.

1. ADC channel input is 200 MHz.

2. LMK04828 clock in is 122.8 MHz.

3. In ADC32RFXX EVM GUI- a) Clock source to ADC set as LMX2582 to ADC.

                                                b) Internal clk Freq = 1536 Msps.

                                                c) ADC32RF45 mode = DDC.

I need max 200 MHz FPGA reference clock from this ADC board. Can you please help me to configure PLL and other parameters of  LMK04828 and LMX2582 to get this reference clock and ADC throughput.

  • Hi Vinay,

    ADC32RFxx EVM GUI is used to configure TI's ADC32RFxxEVM. You said your using a customized board, Can you please clarify how you are using the GUI?

    Did you copy the schematic of ADC32RF45EVM for your customized EVM? Do you have the same USB connection; FTDI IC and SPI connections on the customized EVM?



  • Hi Sir,

     Sorry for late reply, yes we are using same schematic as ADC32RF45EVM Board. I want to specify that we have only max 200 Mhz signal generator .So can you please tell we can use this signal generator and GUI how to configure GUI parameter for this frequency. And please give me information about LMK04828 parameter configuration also.  

  • Hi Vinay,

    Have you programmed the USB product description of your EVM to "ADC32RFxx EVM". using a program like FTDI FT_Prog? If not GUI will not detect the board. If board is detected by GUI,you should get green light on the top right corner beside USB status.

    I have verified DDC /4 mode on ADC32RF45EVM with TS14J56EVM with clock LMX2582 and clock frequency 1536 MHz. As this is using on-board clocking you don't need to use a signal generator for clock input. 

    After you click "PROGRAM EVM" button, before capturing in HSDC Pro, to set the FPGA output clock correctly for 1536 MSPS, double DCLK divider for "CLKout 0 and 1" in "Clock Outputs" tab in "LMK04828" tab as shown below.