DAC5687: Interleave Bus Mode QFLAG

user1120926

Part Number: DAC5687

When the value of sync_fifo(2:0) of SYNC_CNTL register (Address 0x05) is set to 010 and the interleave bus mode QFLAG is set,
Is it okay to open the TXENABLE pin?

over 3 years ago

0 David Chaparro over 3 years ago

TI__Genius 11930 points

Hi,

While having the QFLAG set for the interleaved bus mode you will need the TXENABLE pin to be pulled high so that your data is enabled to the DAC. The TXENABLE pin has an internal pull down resistor, so we recommend using a 10 kOhm resistor to 3.3V to pull it high.

Regards,

David Chaparro

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DAC5687: Interleave Bus Mode QFLAG