ADS1294: Space constrained PCB, antialiasing filter for low-frequency input

Hi Matt,

Even for the signal of interest for your case (0.5-4Hz), you still need to have the anti-aliasing filter for the unwanted frequency content around the multiple of fMOD which is the sampling rate of the delta-sigma ADC. The following blog (see link below) explains the need of anti-aliasing filter. 

The delta-sigma advantage to anti-aliasing filters

There is some previous discussion on the RLD uses for your application in this post (see your link below). The ac-couple of the analog inputs can be employed when the application does not use the patient-drive electrode. In this configuration, you will still be able to maintain a valid common-mode voltage of the input PGA.    

ADS1298: How to properly bias an animal recording brain/cardiac signals?

Thanks.

-TC

Thanks, TC. I guess my two options are:

1. Assume RLD works in my application and use an anti-aliasing + common mode filter design like below (from Three guidelines for designing anti-aliasing filters).

2. Plan for a DC offset and use an AC-coupled circuit (below). The more I read, the more I think the RLD electrode won't be effective at rejecting DC at all my recording sites and may change impedance over time. So the main downsides of AC-coupling are that it (A) increases components (this option requires 9 passive components for each bipolar input channel) and (B) needs to carefully designed for corner frequencies. In my case, Cblock = 0.1uF and Rpull-up = 10Mohm would result in fc = 0.16 Hz, which would be suitable for my pass region of 0.5-4 Hz.

The circuit below reflects the AC-coupled solution, and I would just cascade that design for my 3 channels?

To extend the conversation... I put the filter into LTspice to generate a Bode plot.

The sources are set to 10Hz at 10mV peak-to-peak. Notably, source V1 has been given a 15mV DC offset to confirm the AC coupler works.

Looking at the transient response, the anti-aliased signal sits right on top the input signal while the AC-coupled signal is zero-centered. Below is the Bode plot with the cursor on -3dB at each end of the filtered signal (bottom), giving a passband of 0.16Hz-3.25KHz.

These filters are already on the input stage of the RHD2216 by IntanTech, at about 10x the cost.

What might save my day is that space-saving resistor and capacitor networks can be found for all the necessary values shown here. Using blocks of 4, that keeps the filter BOM at 9 components. Looking forward to any comments or insights.

Thanks again for looking it over TC. In the case of AC coupling, RLDINV and RLDOUT are tied (and RLDREF_INT = 1 to set the reference to mid-supply). Is it suggested to leave RLDIN and RLDREF not connected/floating? Relevant figures attached.

Do you mean RLDREF can be floating if unused? The datasheet has RLDOUT & RLDINV tied (and RLDREF should be disconnected internally via bit RLDREF_INT).