Hi,
The datasheet for the ADS7865 specify a minimum fCLK of 1MHz. Is this just due to the sample and hold stage (self discharge of Cs) or is the converter not functional at all with a lower fCLK?
The reason for this question is that I need to check if I can control the ADS7865 over boundary scan. The fastest clock I can generate is in the range of 58kHz.
Best regards,
Patrick