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Original question:

ADC32RF45: Decimation filter coefficients/functional form

ADC32RF45: DDC accuracy

Yuan Mei1
Prodigy 10 points
Part Number: ADC32RF45

In analyzing the DDC down converted data out of ADC32RF45, we found that I and Q of each sample don't seem to satisfy I=A cos() and Q=A sin() to high accuracy, at least not to 16 bits but more like 12~13 bits.  The measurement was done using phase locked signal input and by correlating I and Q to remove the effects of A.  Our application aims at measuring the amplitude A from I/Q to the highest possible accuracy, therefore the lost bits concern us.  Our guess is that the computation of cos() and sin(), and perhaps the multiplication, may have truncation errors that are visible in the delivered 16-bit I/Q data.  The question is, is it possible to know more details about how this part of the digital algorithm is implemented, so that we can model it and understand our observations?

Thanks.

  • 0
    TI__Mastermind 18065 points

    Yuan:

    The actual converter is a 14-bit ADC.  During the complex mixing and decimation the data is transformed to a 16-bit word generally comprising two octets in the JESD data converter.  As such, I would not expect any better than 14-bit resolution.  There is also some degradation due to jitter and noise.  From an SNR perspective, these parameters impact SNR performance such that the ENOB hovers around 10-bits.  There is also the decimation filter which limits the decimation bandwidth.  That filter may have an impact on the quadrature integrity depending on the signal frequency offset and bandwidth.

    --RJH