Hello,
I am working on a design using the ADS8324 converter. For this design I will be operating the device at the full 50kSample/sec rate so I will have to use the 1.2MHz clock source. This application is for a battery operated acoustic data logger. The end users of the logged data wants to be able to align the samples with absolute time in post processing. For this reason I will be keeping track of the precise start and stop times (based on a GPS disciplined clock) and also measuring the overall drift of the 1.2MHz oscillator between the start and stop times. This information will be used in post processing to correct for clock drift and align the data set in absolute time.
I am trying to better understand the topic of conversion delay through the part. This I believe would result in a constant offset that I would need to subtract in post processing from each sample time to adjust it to absolute time. I read in the user manual on page 7, final chapter in the "Theory of Operation" section that the digital data is provided MSB first on the data out pin for the conversion that is currently in progress. This somewhat confuses me since I don't understand how the digital word for a sample is available before that sample conversion is complete? It also mentions that there is no pipeline delay. In the "Electrical Characteristics" section of the datasheet it states that the "conversion time" is 16 clock cycles and the "acquisition time" is 4.5 clock cycles. Should I use the sum of these two values to better understand the overall sample delay time of the converter?
Thank you for your help and time.
-Sean
