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ADC12DJ3200EVM: Issue with Enabling JMODES with Decimation

Part Number: ADC12DJ3200EVM
Other Parts Discussed in Thread: ADC12DJ3200, , LMK04828

Hello,

I am using an ADC12DJ3200EVM plugged into a TSW14J57 (revE) capture board. I am feeding in an external 1.12 GHz clock (13dBm power) into a 2-way splitter (output at end of each cable from splitter output measures 9 dBm), which feeds into the DEVCLK and LMKCLK inputs on the ADC12DJ3200EVM (the board has been modified to use an external clock). My reference signal is feeding into VINA as a single-ended input. I am configuring the ADC via the ADC12DJ3200 GUI and using High Speed Data Converter Pro v5.00.

With this configuration, I am able to get some of the JMODE's working, such as JMODE0 and JMODE2.The spectral data appears to be correct.

However, I would like to use additional JMODE's, such as JMODE 16. When I attempt to use this mode, I get a DDR "TIMED_OUT_ERROR" message. On the capture card, I see D3 is off, which sounds like a sync failure.

The way I am configuring this board is:

1. Open ADC12DJ3200 GUI and HSDC Pro

2. In ADC12DJ3200 GUI, select clock as external direct, with external Fs selection as 1120 MHz

3. In ADC12DJ3200 GUI, select JMODE 16 in #3, then click "Program Clocks and ADC"

4. In HSDC Pro, I connect to the captuire card, and select the JMODE 16 profile

5. In HSDC Pro, I click the setting cog in the lower left, click the enable check in the upper left, set my ADC sampling rate to 1.12 GHz, with a decimation factor of 16, click OK

6. Then, I hit capture, and get the DDR timeout error.

Any additional steps I can take here to make this work? My resulting lane rate is 2.8G, which seems like it should be fine for the capture card.

Thanks,

Anthony