Hi support team.
Would you please provide the information that the latency from SH_R_rescync(SH_int) rising edge to SH interval rising edge as TBD in DS P56(fig.37) - P60(fig.41)?
Best regards,
Higa
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Hi support team.
Would you please provide the information that the latency from SH_R_rescync(SH_int) rising edge to SH interval rising edge as TBD in DS P56(fig.37) - P60(fig.41)?
Best regards,
Higa
Hi,
Let me investigate your question and feedback to you by Dec 17th.
regards
Shinya
Hi,
In Datasheet, the latency from SH_R_resync(SH_int) riging edge to SH interval rising edge is not shown how many pixels. We do not have these information.
If your customer already PCB board on hand, hopefully they can check it.
regards
Shinya