Hi,
I would like to set up registers by below methods, could you please answer my questions?
1.Are methods for "initial register setting" and "update DAC output" true?
2. In initial register setting, Which is wait time "1" , 50ns or 2.4us?
3. In initial register setting, Which is wait time "2" , 50ns or 2.4us?
4. In update DAC output, Which is true , No.1 or No.2?
Best Regards,
Nishie
Yuta-san,
Here are the answers to your questions about the DAC81408.
1. The initial settings for the registers and the DAC output look ok. However, I think that the default setting for the 0x03 register is 0x0A24. I've put in the first figures below for reference.
2. The wait time for "1" should be 50ns. This is what you would refer to as the /CS high time it is the time between normal writes to the register.
3. The wait time for "2" should be 2.4us. This would be the update from the LDAC falling edge to set the DAC output value to the next falling edge of /CS to set another value for the DAC output. This would be the time for tDACWAIT.
4. For the last picture for the update for the DAC output, No. 2 is true. This shows the time for tDACWAIT. Again this is the time from LDAC falling edge to the next /CS falling edge used to set the next DAC output value. The next figure shows the
I did find some background on the nature of the tDACWAIT specification from an older E2E posting. Here is the link:
https://e2e.ti.com/support/data-converters/f/73/t/855350
The last page of this thread has a summary from Paul Frost that explains the 2.4us specification for tDACWAIT. In the last post, there's an additional diagram that shows the timing. The top waveform is the SPI bus, while the bottom waveform is LDAC.
Joseph Wu
