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DAC084S085: Edge rate or rise/fall time requirement

Cedrick
Expert 8270 points
Part Number: DAC084S085

Hi,

Good day.

Our customer would like to know if DAC084S085 has an edge rate or rise/fall time requirement for the SCLK pin. The datasheet does not call out a rise/fall time specification, and they want to know if the SCLK input signal must meet a certain rise/fall time or edge rate to work properly.

Thank you for your support.


Regards,

Cedrick

  • 0
    TI__Mastermind 39333 points

    Hi Cedrick,

    If there is no rise/fall time specified in the datasheet, then the only requirements that the SCLK will have to meet are the timing requirements given in table 7.6 of the datasheet. The SCLK pulse needs to be high for at least 10ns, and low for at least 10ns. The datasheet gives the input high voltage as at least 2.4V and an input low voltage of below 0.8V for a supply of 5V.

    We recommend not exceeding a rise/fall time of 500ns to avoid extra current being consumed by the device.