I had a few questions regarding the implementation of the DAC53401. Details below:
Aim: To use the DAC to generate a buffered DC voltage of 0.9V, which will be used for setting a bias in summing amplifiers
Please review the circuit shown and let me know if it will operate with a 1.8V SoC for basic functionality. Is there anything I have missed?
Do the I2C connections require pullups? If so, what value would you recommend?
What is the feedback pin FB used for?
I have connected the address pin A0 to a GPIO pin on the SoC, is this the correct way to communicate with it?
I have sent a separate note for documentation feedback, but the DAC53401 datasheet does not show a clean schematic under the “Application” section. It only shows the DAC being connected to VDD and GND. I had to derive the capacitor connections from the layout diagram, and that diagram does not talk about I2C pull-ups etc. If possible, please update the datasheet.