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DAC7760: Shift register behavior

Genius 15690 points
Part Number: DAC7760

Hello,

 

I have some question for the shift register behavior of DAC7760.

My customer will use it as 32bit mode.
Because DAC7760 power and MCU power are completely separated (both are isolated), unexpected power cycle could happen on only DAC side.
In that case, DAC7760 return to 24bit mode although MCU don’t know DAC7760 is reset.

1.
When DAC7760 is configured as 24bit mode and 32bit data was wrongly clocked in and latched, are the first 8bit discarded and are the last 24bit latched?

2.
What is the good way to know whether DAC7760 is unexpectedly reset? 

Regards,
Oba


  • Oba,

    1. I believe that you are correct. When 32 bits are written to the device and the device is configured for 24-bit data, the first 8 bits get discarded in the communication. I tested this using the EVM and writing to the device with a bad write to set the DAC code. First, I set it with a extra byte at the end (which failed the write). Second, I added an extra byte at the beginning (which ignored the first byte and wrote to the DAC code with the last three bytes). I also tested this with a RESET command in a similar way.

    2. There isn't a good way to check to see if the device has been reset. One thing that could be done is to read all the registers. In the register default after power-up, the registers should all read 0, which may be an indication that the device has been reset.


    Joseph Wu

  • Hello Joseph,

    Thanks for your support.

    I have an additional question.
    When the wrong command which is not listed on the datasheet is latched, what happens? Is it just ignored?

    Regards,
    Oba

  • Oba,


    When a wrong command (not listed in the datasheet) is sent to the device, the command is ignored.


    Joseph Wu