This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS9234R: Question for SPI communication

Part Number: ADS9234R

Hello Expert,

I have question for ADS9234R regarding SPI communication.
We configured SPI communication lane between this device and HOST side as below figure which is referred datasheet .

Then, I'd like to know about whether we can communicate with device when we followed the timing chart on datasheet  due to CS and CONVST lane is connected.
Would you answer it?

Also, we should configured DEVICE_STATUS Register(0h)'s ZONE2_TRANSFER bit as 0 when we want communicate with ZONE 2 Transfer?

Thank you and best regards,
Kazuki Kuramochi

  • Hi Kuramochi-san,

    Thank you your post. 

    The connection diagram looks correct. /CS and CONVST can be controlled together. Please make sure to follow the tWH_CONVST and tD_CONVST_CS (min and max) timing specifications. 

    I believe the DEVICE_STATUS register bit 2 does not need to be written to by the user. This bit is set automatically as a status bit only to indicate to the user that Zone 2 was detected. Let me confirm that a user write to this bit is not necessary with the team and reply back to you shortly.



  • Hi Kuramochi-san,

    The ZONE2_TRANSFER bit will be set by the device itself when Zone 2 is detected. The user only needs to write to this bit if they wish to clear the bit.

    To enter Zone 2 Transfer, the user just needs to bring /CS low between 15 ns and 180 ns (6.8 Timing Requirements).