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ADC08D1020: setup and hold clarification

Part Number: ADC08D1020
Other Parts Discussed in Thread: ADC08D1000

One of our designs is migrating from the ADC08D1000 to the ADC08D1020.  The FPGA designers are asking about the setup and hold times on the data interfaces.  The ADC08D1000 datasheet has nS as the units and the ADC08D1020 datasheet has pS, see screenshot below.  Please confirm it the difference is real or a typo?

  • Hi Michael,

    Those units should all be pSec. The bit times are only around 1 to 2 ns depending on output mode, so nSec is incorrect.

    Looks like a typo in the old original ADC08D1000 datasheet that was carried forward into the TI version during the migration in 2012.

    We will work to get this adjusted.