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ADS1248: RTD 3-wires circuit

Sabine Pennavayre-Guirand
Prodigy 20 points
Part Number: ADS1248

Hi,

 

I would like to confirm the circuit that we designed to interface with 3 kind of RTD (PT50, PT100 and PT500). All probes are 3-wires.

Attached is the circuit that we have with the ADS1248IPWR.

We are using the TMS5703137DPGEQQ1 as a microprocessor.

We are using 2 ADC, each ADC interfaces with one 3-wires RTD and other analog inputs. The attached circuit only shows one of the ADC but the second is the exact same circuit.

Communication work well but I have some concerns about the circuit and the readings on the 3-wire RTD.

As you can see below, we are doing 2 reading: 1st between Hi and Sense and 2nd between Sense and Lo.

 

Can you confirm that we need to subtract the second reading from the first reading to remove the lead effect?

Also, I think we need to remove the 100 Ohm resistor from the second reading as we are currently reading about 100 Ohm.

Or do we need to remove the 100 Ohm resistor from the circuit?

 

Can you confirm that I don’t need capacitor between ANI1 and ANI2 when I read the Sense to Lo?

Register Name Bit Setting Description  
Common: Initial device setup
IDAC0 DRDY MODE 0 DOUT/_DRDY pin functions only as Data Out
IMAG 110 Excitation current = 1mA
IDAC1 I1DIR 10x0 IEXC1 (x=don't care)
I2DIR 11xx Disconnected (x=don't care)
Common: Reset PGA to 1  
SYS0 PGA 000 Gain=1
DR 0111 640 SPS
TAT/ADPT setup  
MUX1 VREFCON 01 Internal reference always On
REFSELT 00 REFP0/REFN0 selected
MUXCAL 000 Normal operation
SYS0 PGA 000 Gain=default to 1, depends on installed probe
DR 0111 640 SPS
Channel: TAT_HI/ADPT_HI
MUX0 BCS 00 Burn-out current source Off
MUX_SP 000 AIN0 HI
MUX_SN 001 AIN1 SENSE
Channel: TAT/ADPT SENSE
MUX0 BCS 00 Burn-out current source Off
MUX_SP 001 AIN1 SENSE
MUX_SN 010 AIN2 LO
AOA/AOS/DIODE/BITE set reference
MUX1 VREFCON 01 Internal reference always On
REFSELT 01 REFP1/REFN1 selected
MUXCAL 000 Normal operation
AOA/AOS configuration  
SYS0 PGA 000 Gain=1 (same for all probe)
DR 0111 640 SPS
Channel AOA/AOS Hi
MUX0 BCS 00 Burn-out current source Off
MUX_SP 011 AIN3 HI
MUX_SN 111 AIN7 LO
Channel AOA/AOS Wiper
MUX0 BCS 00 Burn-out current source Off
MUX_SP 100 AIN4 WIPER
MUX_SN 111 AIN7 LO
Channel: DIODE PS/DIODE PT
MUX0 BCS 00 Burn-out current source Off
MUX_SP 101 AIN5
MUX_SN 111 AIN7
SYS0 PGA 001 Gain=2 (same for both diodes)
DR 0111 640 SPS
Channel: BITE
MUX0 BCS 00 Burn-out current source Off
MUX_SP 110 AIN6
MUX_SN 111 AIN7
SYS0 PGA 000 Gain=1
DR 0111 640 SPS

 

Best,

Sabine Pennavayre-Guirand

2727.RTD.pdf

  • 0
    TI__Mastermind 35081 points

    Hi Sabine,

    Here are the answers to your questions

    Sabine Pennavayre-Guirand said:
    Can you confirm that we need to subtract the second reading from the first reading to remove the lead effect?

    Yes, this is necessary for a 3-wire RTD measurement using only 1x IDAC. This is described in section 2.4 of the attached document: https://www.ti.com/lit/an/sbaa275/sbaa275.pdf

    Sabine Pennavayre-Guirand said:

    Also, I think we need to remove the 100 Ohm resistor from the second reading as we are currently reading about 100 Ohm.

    Or do we need to remove the 100 Ohm resistor from the circuit?

    Yes, I would remove this resistor, as the only thing you want to measure with the second reading is the RTD lead resistance. I am also not sure the purpose of C44 or C40.

    Sabine Pennavayre-Guirand said:
    Can you confirm that I don’t need capacitor between ANI1 and ANI2 when I read the Sense to Lo?

    It would be better if you were able to add this capacitor to help filter out differential noise. Also, is there any reason you have different filters on the inputs versus the reference inputs?

    Can you explain the different ground symbols in your schematic? This usually implies split ground planes, which we do not recommend.

    -Bryan

  • 0 in reply to Bryan Lizon86
    Prodigy 20 points

    Hi Bryan

    Thank you for your answer. My system engineer that design the circuit is not in the project anymore, so I don't really know why we have C40 and C44.

    For capacitor filter differences, it seems that my system engineer calculated their values with the two 7.5k resistor (R30 and R32) plus the RTD average value for the inputs but with only R34 and the RTD average value for the reference inputs. I need to read how to calculate those values again (we used sbaa201 for that) to see if I change the value or not.

    We have analog and digital ground. They are both connected close to ADS1248 per TI recommandation. When I checked on the board, both ground planes are connected. It does not seems to cause issue.

    Best,

    Sabine

  • +1 in reply to Sabine Pennavayre-Guirand
    TI__Mastermind 35081 points

    Hi Sabine,

    If you have considered the filtering based off of SBAA201, then you should be okay. That helps explain the different cap values.

    For the grounding, I refer you to the following FAQ: https://e2e.ti.com/support/data-converters/f/data-converters-forum/755516/faq-pcb-layout-guidelines-and-grounding-recommendations-for-high-resolution-adcs

    If the system is working okay, then I presume you can leave this alone. We just often see issues with split ground planes so we recommend having one solid ground plane.

    -Bryan